Pedro J. Gil

发表

Dependability assessment of by-wire control systems using fault injection

Alberto Bonastre, Sara Blanc, Pedro J. Gil, 2009, J. Syst. Archit..

A prototype of a VHDL-based fault injection tool

Pedro J. Gil, Juan Carlos Baraza, Joaquin Gracia, 2000, Proceedings IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

Increasing the Dependability of VLSI Systems through Early Detection of Fugacious Faults

David de Andrés, Jaime Espinosa, Pedro J. Gil, 2015, 2015 11th European Dependable Computing Conference (EDCC).

Improving the Transfer of Safety and Security Competences to Industry: The RISKY Approach

David de Andrés, Pedro J. Gil, Joaquin Gracia, 2013, EWDC.

Injecting Intermittent Faults for the Dependability Assessment of a Fault-Tolerant Microcomputer System

Pedro J. Gil, Daniel Gil, Juan-Carlos Baraza-Calvo, 2016, IEEE Transactions on Reliability.

Using harmonic task-sets to increase the schedulable utilization of cache-based preemptive real-time systems

Andy J. Wellings, Juan José Serrano, Rafael Ors Carot, 1996, Proceedings of 3rd International Workshop on Real-Time Computing Systems and Applications.

Studying the effects of intermittent faults on a microcontroller

Pedro J. Gil, Joaquin Gracia, Daniel Gil, 2012, Microelectron. Reliab..

Fault Emulation for Dependability Evaluation of VLSI Systems

David de Andrés, Pedro J. Gil, Juan-Carlos Ruiz-Garcia, 2008, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Generic Design and Automatic Deployment of NMR Strategies on HW Cores

David de Andrés, Sara Blanc, Pedro J. Gil, 2008, 2008 14th IEEE Pacific Rim International Symposium on Dependable Computing.

Adding instruction cache effect to an exact schedulability analysis of preemptive real-time systems

Andy J. Wellings, Juan José Serrano, Rafael Ors Carot, 1996, Proceedings of the Eighth Euromicro Workshop on Real-Time Systems.

Analysis of the influence of processor hidden registers on the accuracy of fault injection techniques

Pedro J. Gil, Juan Carlos Baraza, Joaquin Gracia, 2004, Proceedings. Ninth IEEE International High-Level Design Validation and Test Workshop (IEEE Cat. No.04EX940).

Non-intrusive Software-Implemented Fault Injection in Embedded Systems

Pedro J. Gil, Pedro Yuste, Lenin Lemus, 2003, LADC.

Fault Injection into VHDL Models: Experimental Validation of a Fault Tolerant Microcomputer System

Pedro J. Gil, José V. Busquets-Mataix, Juan Carlos Baraza, 1999, EDCC.

Resilience-Driven Parameterisation of Ad Hoc Routing Protocols: olsrd as a Case Study

David de Andrés, Pedro J. Gil, Juan-Carlos Ruiz-Garcia, 2011, 2011 IEEE 30th International Symposium on Reliable Distributed Systems.

Design and deployment of a generic ECC-based fault tolerance mechanism for embedded HW cores

David de Andrés, Pedro J. Gil, Juan-Carlos Ruiz-Garcia, 2009, 2009 IEEE Conference on Emerging Technologies & Factory Automation.

Towards benchmarking routing protocols in wireless mesh networks

David de Andrés, Pedro J. Gil, Juan-Carlos Ruiz-Garcia, 2011, Ad Hoc Networks.

Flexible Unequal Error Control Codes with Selectable Error Detection and Correction Levels

Pedro J. Gil, Juan Carlos Baraza, Juan-Carlos Ruiz-Garcia, 2013, SAFECOMP.

A prototype of a VHDL-based fault injection tool: description and application

Pedro J. Gil, Juan Carlos Baraza, Joaquin Gracia, 2002, J. Syst. Archit..

Run-Time Reconfiguration for Emulating Transient Faults in VLSI Systems

David de Andrés, Pedro J. Gil, Juan-Carlos Ruiz-Garcia, 2006, International Conference on Dependable Systems and Networks (DSN'06).

Using Performance, Energy Consumption, and Resilience Experimental Measures to Evaluate Routing Protocols for Ad Hoc Networks

David de Andrés, Pedro J. Gil, Juan-Carlos Ruiz-Garcia, 2011, 2011 IEEE 10th International Symposium on Network Computing and Applications.

Speeding-Up Simulation-Based Fault Injection of Complex HDL Models

Ilya Tuzov, David de Andrés, Juan Carlos Ruiz, 2016, 2016 Seventh Latin-American Symposium on Dependable Computing (LADC).

Adding instruction cache effect to schedulability analysis of preemptive real-time systems

Andy J. Wellings, J. J. Serrano, Juan José Serrano, 1996, Proceedings Real-Time Technology and Applications.

Effects of Intermittent Faults on the Reliability of a Reduced Instruction Set Computing (RISC) Microprocessor

Pedro J. Gil, Juan-Carlos Baraza-Calvo, Joaquin Gracia, 2014, IEEE Transactions on Reliability.

Improvement of fault injection techniques based on VHDL code modification

Pedro J. Gil, Juan Carlos Baraza, Joaquin Gracia, 2005, Tenth IEEE International High-Level Design Validation and Test Workshop, 2005..

Attack Injection to Support the Evaluation of Ad Hoc Networks

David de Andrés, Pedro J. Gil, Juan-Carlos Ruiz-Garcia, 2010, 2010 29th IEEE Symposium on Reliable Distributed Systems.

Improving Error Correction Codes for Multiple-Cell Upsets in Space Applications

Pedro J. Gil, Joaquin Gracia, Daniel Gil, 2018, IEEE Trans. Very Large Scale Integr. Syst..

Distributed industrial control systems: a fault-tolerant architecture

J. J. Serrano, José Carlos Campelo, Juan José Serrano, 1999, Microprocess. Microsystems.

Defining a Representative and Low Cost Fault Model Set for Intermittent Faults in Microprocessor Buses

Pedro J. Gil, Juan-Carlos Baraza-Calvo, Joaquin Gracia, 2013, 2013 Sixth Latin-American Symposium on Dependable Computing.

Searching Representative and Low Cost Fault Models for Intermittent Faults in Microcontrollers: A Case Study

Pedro J. Gil, Juan Carlos Baraza, Joaquin Gracia, 2010, 2010 IEEE 16th Pacific Rim International Symposium on Dependable Computing.

On benchmarking the dependability of automotive engine control applications

Pedro J. Gil, Pedro Yuste, Lenin Lemus, 2004, International Conference on Dependable Systems and Networks, 2004.

On Selecting Representative Faultloads to Guide the Evaluation of Ad Hoc Networks

David de Andrés, Pedro J. Gil, Juan-Carlos Ruiz-Garcia, 2011, 2011 5th Latin-American Symposium on Dependable Computing.

Correction of Adjacent Errors with Low Redundant Matrix Error Correction Codes

Pedro J. Gil, Juan-Carlos Baraza-Calvo, Joaquin Gracia, 2018, 2018 Eighth Latin-American Symposium on Dependable Computing (LADC).

Dependability Models of RAID Using Stochastic Activity Networks

Juan José Serrano, Rafael Ors Carot, Pedro J. Gil, 1996, EDCC.

Ultrafast Single Error Correction Codes for Protecting Processor Registers

Pedro J. Gil, Juan-Carlos Baraza-Calvo, Joaquin Gracia, 2015, 2015 11th European Dependable Computing Conference (EDCC).

Tolerating multiple faults with proximate manifestations in FPGA-based critical designs for harsh environments

David de Andrés, Juan Carlos Ruiz, Jaime Espinosa, 2012, 22nd International Conference on Field Programmable Logic and Applications (FPL).

Fast Emulation of Permanent Faults in VLSI Systems

David de Andrés, Pedro J. Gil, Juan-Carlos Ruiz-Garcia, 2006, 2006 International Conference on Field Programmable Logic and Applications.

An alternative to unify performance and reliability analysis of industrial applications

David de Andrés, Pedro J. Gil, Lenin Lemus, 2000, ESM.

Injecting intermittent faults for the dependability validation of commercial microcontrollers

Pedro J. Gil, Juan Carlos Baraza, Joaquin Gracia, 2008, 2008 IEEE International High Level Design Validation and Test Workshop.

Using Interleaving to Avoid the Effects of Multiple Adjacent Faults in On-Chip Interconnection Lines

Pedro J. Gil, Juan-Carlos Baraza-Calvo, Joaquin Gracia, 2013, EWDC.

Enhancement of Fault Injection Techniques Based on the Modification of VHDL Code

Sara Blanc, Pedro J. Gil, Juan Carlos Baraza, 2008, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Fault injection into VHDL models: analysis of the error syndrome of a microcomputer system

Pedro J. Gil, José V. Busquets-Mataix, Juan Carlos Baraza, 1998, Proceedings. 24th EUROMICRO Conference (Cat. No.98EX204).

Study, comparison and application of different VHDL-based fault injection techniques for the experimental validation of a fault-tolerant system

Pedro J. Gil, Juan Carlos Baraza, Joaquin Gracia, 2003, Microelectron. J..

Analysis of the influence of intermittent faults in a microcontroller

Pedro J. Gil, Juan Carlos Baraza, Joaquin Gracia, 2008, 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems.

Dependability Assessment for the Selection of Embedded Cores

David de Andrés, Pedro J. Gil, Juan-Carlos Ruiz-Garcia, 2008, 2008 Seventh European Dependable Computing Conference.

A Study of the Experimental Validation of Fault-Tolerant Systems Using Different VHDL-Based Fault Injection Techniques

Pedro J. Gil, Juan Carlos Baraza, Joaquin Gracia, 2001, IOLTW.

MCU Tolerance in SRAMs Through Low-Redundancy Triple Adjacent Error Correction

Salvatore Pontarelli, Pedro Reviriego, Juan Antonio Maestro, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Coarse-grained resilience benchmarking using logic score of preferences: ad hoc networks as a case study

David de Andrés, Pedro J. Gil, Juan-Carlos Ruiz-Garcia, 2011, EWDC '11.

A fault hypothesis study on the TTP/C using VHDL-based and pin-level fault injection techniques

Sara Blanc, Pedro J. Gil, Joaquin Gracia, 2002, 17th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2002. DFT 2002. Proceedings..

Impact of Faults in Combinational Logic of Commercial Microcontrollers

Pedro J. Gil, Juan Carlos Baraza, Joaquin Gracia, 2005, EDCC.

Using Dependability, Performance, Area and Energy Consumption Experimental Measures to Benchmark IP Cores

David de Andrés, Pedro J. Gil, Juan-Carlos Ruiz-Garcia, 2009, 2009 Fourth Latin-American Symposium on Dependable Computing.

Using VHDL-based fault injection to exercise error detection mechanisms in the time-triggered architecture

Pedro J. Gil, Juan Carlos Baraza, Joaquin Gracia, 2002, 2002 Pacific Rim International Symposium on Dependable Computing, 2002. Proceedings..

Temporal Characterization of Embedded Systems Using Nexus

José Carlos Campelo, Pedro J. Gil, Juan-Carlos Ruiz-Garcia, 2006, 2006 Sixth European Dependable Computing Conference.

Hierarchical Reliability and Safety Models of Fault Tolerant Distributed Industrial Control Systems

José Carlos Campelo, Juan José Serrano, Pedro J. Gil, 1999, SAFECOMP.

On-chip debugging-based fault emulation for robustness evaluation of embedded software components

Juan Pardo, José Carlos Campelo, Pedro J. Gil, 2005, 11th Pacific Rim International Symposium on Dependable Computing (PRDC'05).

The Challenge of Detection and Diagnosis of Fugacious Hardware Faults in VLSI Designs

David de Andrés, Jaime Espinosa, Pedro J. Gil, 2013, EWDC.

Modified Hamming Codes to Enhance Short Burst Error Detection in Semiconductor Memories (Short Paper)

Pedro J. Gil, Daniel Gil, Juan-Carlos Ruiz-Garcia, 2014, 2014 Tenth European Dependable Computing Conference.

Comparison and application of different VHDL-based fault injection techniques

Pedro J. Gil, Juan Carlos Baraza, Joaquin Gracia, 2001, Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

FADES: a fault emulation tool for fast dependability assessment

David de Andrés, Pedro J. Gil, Juan-Carlos Ruiz-Garcia, 2006, 2006 IEEE International Conference on Field Programmable Technology.

An Attack Injection Approach to Evaluate the Robustness of Ad Hoc Networks

David de Andrés, Pedro J. Gil, Juan-Carlos Ruiz-Garcia, 2009, 2009 15th IEEE Pacific Rim International Symposium on Dependable Computing.

Design and validation of a distributed industrial control system's nodes

José Carlos Campelo, Juan José Serrano, Pedro J. Gil, 1999, Proceedings of the 18th IEEE Symposium on Reliable Distributed Systems.

INERTE: integrated nexus-based real-time fault injection tool for embedded systems

Juan José Serrano, David de Andrés, Pedro J. Gil, 2003, 2003 International Conference on Dependable Systems and Networks, 2003. Proceedings..

Improving the multiple errors detection coverage in distributed embedded systems

Sara Blanc, Pedro J. Gil, P. Gil, 2003, 22nd International Symposium on Reliable Distributed Systems, 2003. Proceedings..

Experimental validation of a fault tolerant microcomputer system against intermittent faults

Pedro J. Gil, Juan Carlos Baraza, Joaquin Gracia, 2010, 2010 IEEE/IFIP International Conference on Dependable Systems & Networks (DSN).

A study of the effects of transient fault injection into the VHDL model of a fault-tolerant microcomputer system

Pedro J. Gil, Juan Carlos Baraza, Joaquin Gracia, 2000, Proceedings 6th IEEE International On-Line Testing Workshop (Cat. No.PR00646).

Dependability Evaluation of Fault Tolerant Distributed Industrial Control Systems

José Carlos Campelo, Juan José Serrano, Pedro J. Gil, 1999, IPPS/SPDP Workshops.

Ultrafast Error Correction Codes for Double Error Detection/Correction

Juan Carlos Ruiz, Pedro J. Gil, Juan-Carlos Baraza-Calvo, 2016, 2016 12th European Dependable Computing Conference (EDCC).

Experiences during the experimental validation of the time-triggered architecture

Sara Blanc, Pedro J. Gil, Joaquin Gracia, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.