Neha Kumari

A 8-ns Settling Time Fully Integrated LDO with Dynamic Biasing and Bulk Modulation Techniques in 40nm CMOS

Ying-Hsi Lin, Shian-Ru Lin, Ke-Horng Chen, 2020, ISCAS.

3.8 A 23.6ppm/°C Monolithically Integrated GaN Reference Voltage Design with Temperature Range from −50°C to 200°C and Supply Voltage Range from 3.9 to 24V

Ying-Zong Juang, Shang-Hsien Yang, Shian-Ru Lin, 2020, 2020 IEEE International Solid- State Circuits Conference - (ISSCC).

A CMOS Switched-Capacitor Boost Mode Envelope Tracking Regulator with 4% Efficiency Improvement at 7.7dB PAPR for 20MHz LTE Envelope Tracking RF Power Amplifiers

Ying-Hsi Lin, Shang-Hsien Yang, Shian-Ru Lin, 2019, 2019 IEEE Asian Solid-State Circuits Conference (A-SSCC).