Osamu Tsuchiya

发表

A method for manufacturing a semiconductor integrated circuit

Nozomi Horino, Akihiro Tomozawa, Yoku Kaino, 1984 .

A 130-nm CMOS 95-mm2 1-Gb Multilevel AG-AND-Type Flash Memory with 10-MB/s Programming Throughput

Takashi Kobayashi, Kazunori Furusawa, Keiichi Yoshida, 2006, IEICE Trans. Electron..

A 126 mm2 4-Gb Multilevel AG-AND Flash Memory with Inversion-Layer-Bit-Line Technology

Masahiro Shimizu, Takashi Kobayashi, Kazunori Furusawa, 2007, IEICE Trans. Electron..

Code symbol imaging device and code symbol reading device

内藤英浩, 土屋修, 山田祥也, 2009 .

Determinant formula for the six-vertex model with reflecting end

Osamu Tsuchiya, Osamu Tsuchiya, 1998, solv-int/9804010.