Tianshen Tang

Characterization and analysis of diode-string ESD protection in 28nm CMOS by VFTLP

Cheng Li, Yuhua Cheng, Xuejie Shi, 2017, 2017 IEEE 24th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA).

A study of accurate extraction of ESD parasitic capacitance

Cheng Li, Yuhua Cheng, Albert Wang, 2016, 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

Analysis and characterization of process/layout impacts on the performance of high-speed analog circuits

Feng Zou, Yuhua Cheng, Long Zhao, 2017, 2017 IEEE 12th International Conference on ASIC (ASICON).

A comparison study of DTSCR by TCAD and VFTLP for CDM ESD protection

Cheng Li, Yuhua Cheng, Albert Wang, 2017, 2017 IEEE 24th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA).

Circuit-level ESD protection simulation using behavior models in 28nm CMOS

Shaofeng Yu, Cheng Li, Yuhua Cheng, 2017, 2017 IEEE 24th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA).