Antonio Deledda

RTL-to-layout implementation of an embedded coarse grained architecture for dynamically reconfigurable computing in systems-on-chip

Roberto Guerrieri, Davide Rossi, Fabio Campi, 2009, 2009 International Symposium on System-on-Chip.

A cycle-accurate ISS for a dynamically reconfigurable processor architecture

Claudio Mucci, Fabio Campi, Alberto Fazzi, 2005, 19th IEEE International Parallel and Distributed Processing Symposium.

Design and implementation of a reconfigurable heterogeneous multiprocessor SoC

Roberto Guerrieri, Andrea Lodi, Claudio Mucci, 2006, IEEE Custom Integrated Circuits Conference 2006.

A dynamically adaptive DSP for heterogeneous reconfigurable platforms

Andrea Lodi, Claudio Mucci, Fabio Campi, 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

A multi-core signal processor for heterogeneous reconfigurable computing

Davide Rossi, Claudio Mucci, Fabio Campi, 2009, 2009 International Symposium on System-on-Chip.

Design of a HW/SW Communication Infrastructure for a Heterogeneous Reconfigurable Processor

Riccardo Locatelli, Jürgen Becker, Michael Hübner, 2008, 2008 Design, Automation and Test in Europe.

Implementation of Parallel LFSR-based Applications on an Adaptive DSP featuring a Pipelined Configurable Gate Array

Claudio Mucci, Fabio Campi, Luca Ciccarelli, 2008, 2008 Design, Automation and Test in Europe.

A stream register file unit for reconfigurable processors

Claudio Mucci, Fabio Campi, Antonio Deledda, 2006, 2006 IEEE International Symposium on Circuits and Systems.

An Interconnect Strategy for a Heterogeneous, Reconfigurable SoC

Marcello Coppola, Riccardo Locatelli, Jürgen Becker, 2008, IEEE Design & Test of Computers.

Exploration of communication strategies for computationintensive Systems-On-Chip

Antonio Deledda, 2008 .

XiSystem: a XiRisc-based SoC with a reconfigurable IO module

Roberto Guerrieri, Andrea Lodi, Claudio Mucci, 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..