Ravikant Kumar

Clock Gating Aware Low Power Global Reset ALU and Implementation on 28nm FPGA

Bishwajeet Pandey, Jagdish Kumar, Jyotsana Yadav, 2013, 2013 5th International Conference on Computational Intelligence and Communication Networks.

Low voltage DCI based low power VLSI circuit implementation on FPGA

Bishwajeet Pandey, Ravikant Kumar, 2013, 2013 IEEE CONFERENCE ON INFORMATION AND COMMUNICATION TECHNOLOGIES.