S R Ramesh

Design and Implementation of an Optimized Double Precision Floating Point Divider using Cache Memory

S R Ramesh, 2010 .

Cross talk Effects on Mixed Signal CMOS ICs

S R Ramesh, Anu Baby, Reeja Raju, 2010 .

Low Power Cubic Computation Unit Using Vedic Sutras

S R Ramesh, P Aatmica, V Ranjith, 2019 .

Design of an Area Optimized Double Precision Floating Point Divider on FPGA

S R Ramesh, 2010, IIS 2010.

An Efficient FIR Filter Design using CSE Method

S R Ramesh, Sai priya.V, N.Swetha Reddy, 2014 .