Chin-Shan Hou

Die cracking evaluation and improvement in ULSI plastic package

Ming-Jer Chen, Kuo-Yu Chou, Chiu-Cheng Lin, 2001, ICMTS 2001. Proceedings of the 2001 International Conference on Microelectronic Test Structures (Cat. No.01CH37153).

A design strategy for short gate length SOI MESFETs

Ching-Yuan Wu, Chin-Shan Hou, Ching-Yuan Wu, 1996 .

Back-gate bias enhanced band-to-band tunneling leakage in scaled MOSFET's

Chin-Shan Hou, Kuo-Nan Yang, Ming-Jer Chen, 1998 .

Cell-based analytic statistical model with correlated parameters for intrinsic breakdown of ultrathin oxides

Mong-Song Liang, Chin-Shan Hou, M. Liang, 1999 .

A compact model of holding voltage for latch-up in epitaxial CMOS

Yeh-Ning Jou, Chin-Shan Hou, Ming-Jer Chen, 1997, 1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual.

A 2-D analytic model for the threshold-voltage of fully depleted short gate-length Si-SOI MESFETs

Chin-Shan Hou, Ching-Yuan Wu, 1995 .