Masato Nagamatsu

A 150 MIPS/W CMOS RISC processor for PDA applications

Masato Nagamatsu, Hiroaki Murakami, Kamran Malik, 1995, Proceedings ISSCC '95 - International Solid-State Circuits Conference.

CPU for PlayStation(R)2

Masato Nagamatsu, Nobuyuki Ikumi, Yasuyuki Yamamoto, 2001, Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001.

Development of PPF(Pre-Plated-Frame)Package Process

Masato Nagamatsu, Yoshihisa Kondo, Peter Yan-Tek Hsu, 1994 .

Importance of CAD tools and methodology in high speed CPU design: invited talk

Masato Nagamatsu, Nobuyuki Ikumi, Yasuyuki Yamamoto, 2000, ASP-DAC '00.

12-4 A Ions 54 X 54-bit Parallel Structured Full Array Multiplier with 0.5pm CMOS Technology

Masato Nagamatsu, J. Mori, Kenji Maeguchi, 1990 .

A microprocessor with a 128-bit CPU, ten floating-point MAC's, four floating-point dividers, and an MPEG-2 decoder

Masato Nagamatsu, Masayoshi Tanaka, Hiroaki Murakami, 1999, IEEE J. Solid State Circuits.

CPU for PlayStation 2

Masato Nagamatsu, Nobuyuki Ikumi, Yasuyuki Yamamoto, 2001, DATE.