Y. Kiyota

High-Frequency Noise of Modern MOSFETs: Compact Modeling and Measurement Issues

M.J. Deen, Chih-Hung Chen, S. Asgaran, 2006, IEEE Transactions on Electron Devices.

Study of solar simulator calibration method and round robin calibration plan of primary standard solar cell for space use

Sumio Matsuda, Y. Uchida, Y. Kiyota, 1994, Proceedings of 1994 IEEE 1st World Conference on Photovoltaic Energy Conversion - WCPEC (A Joint Conference of PVSC, PVSEC and PSEC).

Analytical Determination of MOSFET's High-Frequency Noise Parameters From NF$_{50}$ Measurements and Its Application in RFIC Design

M.J. Deen, Chih-Hung Chen, S. Asgaran, 2007, IEEE Journal of Solid-State Circuits.

100-GHz f/sub T/ Si homojunction bipolar technology

K. Washio, M. Tanabe, Y. Kiyota, 1996, 1996 Symposium on VLSI Technology. Digest of Technical Papers.

190-GHz f/sub T/, 130-GHz f/sub max/ SiGe HBTs with heavily doped base formed by HCl-free selective epitaxy

K. Washio, T. Hashimoto, A. Kodama, 2002, Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting.

A 0.2-/spl mu/m 180-GHz-f/sub max/ 6.7-ps-ECL SOI/HRS self aligned SEG SiGe HBT/CMOS technology for microwave and high-speed digital applications

K. Washio, M. Tanabe, Y. Kiyota, 2000, International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138).

A CMOS-compatible rapid vapor-phase doping process for CMOS scaling

P. Ashburn, T. Shiba, Y. Kiyota, 2004, IEEE Transactions on Electron Devices.

Sub-Quarter-Micron PMOSFETs With Shallow Source And Drain Formed By Rapid Vapor-phase Doping (RVD)

Y. Kiyota, T. Nakamura, T. Inada, 1993, Symposium 1993 on VLSI Technology.

Design and performance of 0.1- mu m CMOS devices using low-impurity-channel transistors (LICT's)

T. Nishida, T. Kure, K. Shimohigashi, 1992, IEEE Electron Device Letters.

0.1 mu m CMOS devices using low-impurity-channel transistors (LICT)

Shinji Okazaki, Tokuo Kure, Katsuhiro Shimohigashi, 1990, International Technical Digest on Electron Devices.