Donggun Park

发表

A 4-Bit Double SONOS Memory (DSM) with 4 Storage Nodes per Cell for Ultimate Multi-Bit Operation

Chang Woo Oh, Sung Hwan Kim, Na Young Kim, 2006, 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers..

Present and Future of Si-based Transistor Technology for Memories

Donggun Park, Byung-Il Ryu, 2006 .

Programmable virtual source/drain MOSFETs

Hyungcheol Shin, Il Han Park, Chilhee Chung, 2004, Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850).

B8-1 An Analysis of Characteristics of Korean Females' Lower Body Shape Using Fuzzy Logic and Classification Methods

Myung Hwan Yun, Donggun Park, Sung Hee Ahn, 2017 .

1H3-1 Affective qualities in in-vehicle interiors ? a case study on instrument panel via semantic network analysis

Myung Hwan Yun, Donggun Park, Joong Hee Lee, 2019 .

New automatic de-registration method utilizing a timer in the IEEE802.1 TSN

Juho Lee, Donggun Park, Sungkwon Park, 2016, 2016 First IEEE International Conference on Computer Communication and the Internet (ICCCI).

Quantitative analysis of SILCs (stress-induced leakage currents) based on the inelastic trap-assisted tunneling model

Donggun Park, Chenming Hu, Katsuhiko Kubota, 1999, Advanced Lithography.

A Highly Scalable Split-Gate SONOS Flash Memory with Programmable-Pass and Pure-Select Transistors for Sub-90-nm Technology

Chilhee Chung, Byung-Gook Park, Jong Duk Lee, 2004 .

Analysis of Sensing margin in Silicon-On-ONO (SOONO) Device for the Capacitor-less RAM Applications

Chang Woo Oh, Sung Hwan Kim, Na Young Kim, 2007, 2007 IEEE International SOI Conference.

Body Type Classification of Korean Female for Designing Driver’s Seat

Myung Hwan Yun, Donggun Park, Seungwon Baek, 2015 .

A Full FinFET DRAM Core Integration Technology Using a Simple Selective Fin Formation Technique

Chul Lee, Donggun Park, Hui-Jung Kim, 2006, 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers..

Comparison of Clustering Methods for Obesity Classification

Myung Hwan Yun, Donggun Park, Sung Hee Ahn, 2018, 2018 IEEE International Conference on Industrial Engineering and Engineering Management (IEEM).

A Novel Multi-Functional Silicon-On-ONO (SOONO) MOSFETs for SoC Applications: Electrical Characterization for High Performance Transistor and Embedded Memory Applications

Chang Woo Oh, Sung Hwan Kim, Na Young Kim, 2006, 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers..

Effects of RTA and WSi/sub x/-polycide gate processes on MOSFET reliability for giga-bit scale DRAMs

Donggun Park, Nak-Jin Son, Jin Hyeok Kim, 2000, 2000 IEEE International Integrated Reliability Workshop Final Report (Cat. No.00TH8515).

Development of in-Vehicle Auditory Display using Sound Quality Metrics

Wonjoon Kim, Myung Hwan Yun, Donggun Park, 2016 .

Personal Mobility Device and User Experience: A State-of-the-art Literature Review

Myung Hwan Yun, Donggun Park, Gee Won Shin, 2018 .

Development of Affective Visual Quality for Vehicle Trunk using Affective Engineering

Wonjoon Kim, Myung Hwan Yun, Donggun Park, 2015 .

Analysis of customers’ satisfaction with automobile exterior panel stiffness: focus on the hood and doors of mid-sized sedan

Wonjoon Kim, Myung Hwan Yun, Donggun Park, 2019 .

Electrical reliability of highly reliable 256M-bit mobile DRAM with top-edge round STI and dual gate oxide

Donggun Park, Chihoon Lee, Hyeong Joon Kim, 2003, Microelectron. Reliab..

4-Bit Double SONOS Memories (DSMs) Using Single-Level and Multi-Level Cell Schemes

Chang Woo Oh, Sung Hwan Kim, Na Young Kim, 2006, 2006 International Electron Devices Meeting.

2C2-2 Modelling of the Auditory Satisfaction Function for the Automobile Door Opening Quality

Wonjoon Kim, Myung Hwan Yun, Donggun Park, 2015 .

Floating Body DRAM Characteristics of Silicon-On-ONO (SOONO) Devices for System-on-Chip (SoC) Applications

Chang Woo Oh, Sung Hwan Kim, Na Young Kim, 2007, 2007 IEEE Symposium on VLSI Technology.

Sub-20nm Surrounding-Gate Bridge-Channel MOSFETs for Low Power and High Performance Applications

Sung Min Kim, Dong-Won Kim, Donggun Park, 2007, 2007 IEEE International Conference on Integrated Circuit Design and Technology.

Stack DRAM Technologies for the Future

Donggun Park, Byung-il Ryu, Wonshick Lee, 2006, 2006 International Symposium on VLSI Technology, Systems, and Applications.

A Study on Affective Dimensions to Engine Acceleration Sound Quality Using Acoustic Parameters

Wonjoon Kim, Myung Hwan Yun, Donggun Park, 2019, Applied Sciences.

Novel body tied FinFET cell array transistor DRAM with negative word line operation for sub 60nm technology and beyond

Donggun Park, Kinam Kim, T.Y. Kim, 2004, Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004..

The application of BT-FinFET technology for sub 60nm DRAM integration

Chul Lee, Donggun Park, Seung Bae Park, 2005, 2005 International Conference on Integrated Circuit Design and Technology, 2005. ICICDT 2005..

3-dimensional nano-CMOS transistors to overcome scaling limits

Donggun Park, Byung-Il Ryu, Kinam Kim, 2004, Proceedings. 7th International Conference on Solid-State and Integrated Circuits Technology, 2004..

Co-existence of Random Telegraph Noise and Single-Hole-Tunneling State in Gate-All-Around PMOS Silicon Nanowire Field-Effect-Transistors

Dong-Won Kim, Donggun Park, Sungwoo Hwang, 2011 .

User’s Attitude towards Photo based on Sharing Behavior and Personal Value

Myung Hwan Yun, Donggun Park, Ye Lim Rhie, 2014 .

User centered gesture development for smart lighting

Myung Hwan Yun, Donggun Park, Yushin Lee, 2016 .

Test structure for performance evaluation of 3 dimensional FinFETs

Chul Lee, Tae Yong Kim, Donggun Park, 2005, Proceedings of the 2005 International Conference on Microelectronic Test Structures, 2005. ICMTS 2005..

An Analysis of User Experience of Smartphone based on Product Smartness utilizing Social Media Data

Wonjoon Kim, Myung Hwan Yun, Donggun Park, 2016 .

The future outlook of memory devices

Donggun Park, Kinam Kim, 2007, ESSCIRC 2007 - 33rd European Solid-State Circuits Conference.

A 31 ns Random Cycle VCAT-Based 4F $^{2}$ DRAM With Manufacturability and Enhanced Cell Efficiency

Ki-Whan Song, Young-Hyun Jun, Jinyoung Kim, 2010, IEEE Journal of Solid-State Circuits.

Three-dimensional MBCFET as an ultimate transistor

Chang Woo Oh, Donggun Park, Kinam Kim, 2004 .

Experimental Investigations on Carrier Transport in Si Nanowire Transistors: Ballistic Efficiency and Apparent Mobility

Xing Zhang, Ru Huang, Donggun Park, 2008, IEEE Transactions on Electron Devices.

Low Voltage Program/Erase Characteristics of Si Nanocrystal Memory with Damascene Gate FinFET on Bulk Si Wafer

Donggun Park, Byung-Il Ryu, Eun Suk Cho, 2006 .

Hf-silicate inter-poly dielectric technology for sub 70nm body tied FinFET flash memory

Donggun Park, Byung-Il Ryu, Yonghan Roh, 2005, Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..

Experimental study on quasi-ballistic transport in silicon nanowire transistors and the impact of self-heating effects

Ru Huang, Donggun Park, Runsheng Wang, 2008, 2008 IEEE International Electron Devices Meeting.

High performance twin silicon nanowire MOSFET(TSNWFET) on bulk si wafer

Sung Min Kim, Chang Woo Oh, Sung Hwan Kim, 2008, 2006 IEEE Nanotechnology Materials and Devices Conference.

A novel sub-50 nm multi-bridge-channel MOSFET (MBCFET) with extremely high performance

Chang Woo Oh, Donggun Park, Kinam Kim, 2004, Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004..

Investigation of Low-Frequency Noise in Silicon Nanowire MOSFETs

Ru Huang, Yu Tian, Donggun Park, 2009, IEEE Electron Device Letters.

Reliability Investigations for Bulk-FinFETs Implementing Partially-Insulating Layer

Donggun Park, Wouns Yang, Chang-Hoon Jeon, 2007, 2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual.

A study of negative-bias temperature instability of SOI and body-tied FinFETs

Donggun Park, Hyunjin Lee, Yang-Kyu Choi, 2005 .

Plasma charging damage on ultrathin gate oxides

Donggun Park, Chenming Hu, C. Hu, 1998 .

Technology Breakthrough of Body-Tied FinFET for sub 50 nm NOR Flash Memory

Donggun Park, Byung-Il Ryu, Eun Suk Cho, 2006, 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers..

Investigation of mobility in twin silicon nanowire MOSFETs (TSNWFETs)

Hyungcheol Shin, Byung-Gook Park, Donggun Park, 2008, 2008 9th International Conference on Solid-State and Integrated-Circuit Technology.

Nanoscale Si-based 3-dimensional MOSFETs

Donggun Park, Byung-Il Ryu, Dong-Won Kim, 2006, 2006 IEEE International Conference on IC Design and Technology.

Negative-Bias Temperature Instability in Gate-All-Around Silicon Nanowire MOSFETs: Characteristic Modeling and the Impact on Circuit Aging

Ru Huang, Donggun Park, Runsheng Wang, 2010, IEEE Transactions on Electron Devices.

Improved post-cycling characteristic of FinFET NAND Flash

Donggun Park, Byung-Il Ryu, Eun Suk Cho, 2006, 2006 International Electron Devices Meeting.

Plasma Charging Damage On Ultra-thin Gate Oxides

Donggun Park, Chenming Hu, 1997, 2nd International Symposium on Plasma Process-Induced Damage.

122 Mb High Speed SRAM Cell with 25 nm Gate Length Multi-Bridge-Channel MOSFET (MBCFET) on Bulk Si Substrate

Sung Min Kim, Donggun Park, Byung-Il Ryu, 2006, 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers..

Paired FinFET Charge Trap Flash Memory for Vertical High Density Storage

Donggun Park, Choong-Ho Lee, Wonjoo Kim, 2006, 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers..

A 2 Gb NAND flash memory with 0.044 /spl mu/m/sup 2/ cell size using 90 nm flash technology

Donggun Park, Kinam Kim, Wang-Chul Shin, 2002, Digest. International Electron Devices Meeting,.

Sub-25nm single-metal gate CMOS multi-bridge-channel MOSFET (MBCFET) for high performance and low power application

Donggun Park, Kinam Kim, Byung-il Ryu, 2005, Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..

Body effects in tri-gate bulk FinFETs for DTMOS

Jin-Woo Han, Donggun Park, Choong-Ho Lee, 2006, 2006 IEEE Nanotechnology Materials and Devices Conference.

Hot carrier generation and reliability of BT(body-tied)-Fin type SRAM cell transistors (W/sub fin/=20/spl sim/70 nm)

Donggun Park, Byung-Il Ryu, Eun Suk Cho, 2005, 2005 IEEE International Reliability Physics Symposium, 2005. Proceedings. 43rd Annual..

Sub 30 nm multi-bridge-channel MOSFET (MBCFET) with metal gate electrode for ultra high performance application

Chang Woo Oh, Sung Hwan Kim, Donggun Park, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

Experimental investigation and design optimization guidelines of characteristic variability in silicon nanowire CMOS technology

Ru Huang, Xing Zhang, Xin Huang, 2009, 2009 IEEE International Electron Devices Meeting (IEDM).

A Novel Structure of SiO2/SiN/High k Dielectrics, Al2O3 for SONOS Type Flash Memory

Donggun Park, Kinam Kim, Sung-Hoi Hur, 2002 .

NEMS switch with 30 nm thick beam and 20 nm high air gap for high density non-volatile memory applications

Donggun Park, Keun Hwi Cho, Weon Wi Jang, 2007 .

Enhanced data retention of damascene-finFET DRAM with local channel implantation and <100> fin surface orientation engineering

Donggun Park, Byung-Il Ryu, Eun Suk Cho, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

25nm Programmable Virtual Source/Drain MOSFETs Using a Twin SONOS Memory Structure

Byung-Gook Park, Donggun Park, Young June Park, 2005, 2005 International Semiconductor Device Research Symposium.

Investigation on Variability in Metal-Gate Si Nanowire MOSFETs: Analysis of Variation Sources and Experimental Characterization

Ru Huang, Donggun Park, Runsheng Wang, 2011, IEEE Transactions on Electron Devices.

Transistor Characteristics with Ta O Gate Dielectric

Donggun Park, Chenming Hu, Tsu-Jae King, 1998 .

Highly scalable and reliable 2-bit/cell SONOS memory transistor beyond 50nm NVM technology using outer sidewall spacer scheme with damascene gate process

Byung-Gook Park, Chang Woo Oh, Sung Hwan Kim, 2005, Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..

Possibility of Transport Through a Single Acceptor in a Gate-All-Around Silicon Nanowire PMOSFET

Donggun Park, Sung Woo Hwang, Keun Hwi Cho, 2009, IEEE Transactions on Nanotechnology.

Highly Manufacturable Single-Bridge-Channel MOSFET (SBCFET)

Donggun Park, Sung-Young Lee, Dong-Won Kim, 2006, 2006 IEEE International Conference on IC Design and Technology.

Reliability of thin SiO2 at direct-tunneling voltages

Donggun Park, Chenming Hu, K. F. Schuegraf, 1994 .

Fully working high performance multi-channel field effect transistor (McFET) SRAM cell on bulk Si substrate using TiN single metal gate

Sung Min Kim, Chang Woo Oh, Sung Hwan Kim, 2005, Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..

Highly manufacturable sub-50 nm high performance CMOSFET using real damascene gate process

Donggun Park, Kyung-Hwan Yeo, Kinam Kim, 2003, 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407).

Gate-all-around Twin Silicon nanowire SONOS Memory

Donggun Park, Keun Hwi Cho, Kyoung Hwan Yeo, 2007, 2007 IEEE Symposium on VLSI Technology.

Experimental Investigation on Superior PMOS Performance of Uniaxial Strained ≪110≫ Silicon Nanowire Channel By Embedded SiGe Source/Drain

Donggun Park, Keun Hwi Cho, Kyoung Hwan Yeo, 2007, 2007 IEEE International Electron Devices Meeting.

Negative bias temperature instability(NBTI) of bulk FinFETs

Donggun Park, Tai-su Park, T. Park, 2005, 2005 IEEE International Reliability Physics Symposium, 2005. Proceedings. 43rd Annual..

SONOS-Type FinFET Device Using P+ Poly-Si Gate and High-k Blocking Dielectric Integrated on Cell Array and GSL/SSL for Multi-Gigabit NAND Flash Memory

Seung Beom Kim, Donggun Park, Byung-Il Ryu, 2006, 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers..

Extraction of voltage transfer characteristic of inverter based on TSNWFETs

Hyungcheol Shin, Donggun Park, Sung Dae Suk, 2008, 2008 9th International Conference on Solid-State and Integrated-Circuit Technology.

Gate-all-around single silicon nanowire MOSFET with 7 nm width for SONOS NAND flash memory

Donggun Park, Jun Seo, Keun Hwi Cho, 2008, 2008 Symposium on VLSI Technology.

TSNWFET for SRAM cell application: Performance variation and process dependency

Donggun Park, Dong Won Kim, Kyoung Hwan Yeo, 2008, 2008 Symposium on VLSI Technology.

Fully Integrated Advanced Bulk FinFETs Architecture Featuring Partially-Insulating Technique for DRAM Cell Application of 40nm Generation and Beyond

Donggun Park, Byung-Il Ryu, Wouns Yang, 2006, 2006 International Electron Devices Meeting.

Impact of time dependent dielectric breakdown and stress-induced leakage current on the reliability of high dielectric constant (Ba,Sr)TiO/sub 3/ thin-film capacitors for Gbit-scale DRAMs

Donggun Park, Chenming Hu, Shintaro Yamamichi, 1999 .

Reliability of thin SiO/sub 2/ at direct-tunneling voltages

Donggun Park, Chenming Hu, K. F. Schuegraf, 1994, Proceedings of 1994 IEEE International Electron Devices Meeting.

Fully integrated SONOS flash memory cell array with BT (body tied)-FinFET structure

Chang Woo Oh, Donggun Park, Eun Suk Cho, 2006 .

A Unified Compact Model of the Gate Oxide Reliability for Complete Circuit Level Analysis

Young-Kwan Park, Donggun Park, Moon-Hyun Yoo, 2007, 2007 IEEE International Electron Devices Meeting.

New insights into oxide traps characterization in gate-all-around nanowire transistors with TiN metal gates based on combined Ig-Id RTS technique

Ru Huang, Donggun Park, Runsheng Wang, 2006, 2009 Symposium on VLSI Technology.

A full-process damage detection method using small MOSFET and protection diode

Donggun Park, Chenming Hu, Scott Zheng, 1996 .

Temperature-Dependent Characteristics of Cylindrical Gate-All-Around Twin Silicon Nanowire MOSFETs (TSNWFETs)

Donggun Park, Sung Woo Hwang, Keun Hwi Cho, 2007, IEEE Electron Device Letters.

New insights into oxide traps characterization in gate-all-around nanowire transistors with TiN metal gates based on combined I g -I d RTS technique

Ru Huang, Donggun Park, Runsheng Wang, 2006, VLSIT 2006.

Investigation on Self-Heating Effect in Gate-All-Around Silicon Nanowire MOSFETs From Top-Down Approach

Ru Huang, Donggun Park, Runsheng Wang, 2009, IEEE Electron Device Letters.

Experimental investigations on channel backscattering characteristics of gate-all-around silicon nanowire transistors from top-down approach

Ru Huang, Donggun Park, Runsheng Wang, 2008 .

A study on selective Si0.8Ge0.2 etch using polysilicon etchant diluted by H2O for three-dimensional Si structure application

Donggun Park, Jeong-Dong Choe, Sung-min Kim, 2003 .

A novel multi-channel field effect transistor (McFET) on bulk Si for high performance sub-80nm application

Sung Min Kim, Chang Woo Oh, Sung Hwan Kim, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

Damascene gate FinFET SONOS memory implemented on bulk silicon wafer

Chang Woo Oh, Sung Hwan Kim, Donggun Park, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

Negative Bias Temperature Instability(NBT1) of Bulk FinFETs

Donggun Park, Tai-su Park, Kinam Kim, 2005 .

Impacts of non-negligible electron trapping/detrapping on the NBTI characteristics in silicon nanowire transistors with TiN metal gates

Ru Huang, Donggun Park, Runsheng Wang, 2008, 2008 IEEE International Electron Devices Meeting.

Body Thickness Dependence of Impact Ionization in a Multiple-Gate FinFET

Jin-Woo Han, Donggun Park, Yang-Kyu Choi, 2007, IEEE Electron Device Letters.

Fin width scaling criteria of body-tied FinFET in sub-50 nm regime

Jin Young Kim, Chang Woo Oh, Donggun Park, 2004, Conference Digest [Includes 'Late News Papers' volume] Device Research Conference, 2004. 62nd DRC..

Data retention characteristics of sub-100 nm NAND flash memory cells

Donggun Park, Kinam Kim, Jae-Duk Lee, 2003 .

Random Telegraph Noise in n-type and p-type silicon nanowire transistors

Hyungcheol Shin, Donggun Park, Kyoung Hwan Yeo, 2008, 2008 IEEE International Electron Devices Meeting.

Trap Layer Engineered FinFET NAND Flash with Enhanced Memory Window

Seung Beom Kim, Donggun Park, Byung-Il Ryu, 2006, 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers..