Rafael Gadea Gironés

发表

A mixed hardware-software approach to flexible Artificial Neural Network training on FPGA

Ramón José Aliaga, Rafael Gadea Gironés, Ricardo José Colom-Palero, 2009, 2009 International Symposium on Systems, Architectures, Modeling, and Simulation.

Flexible architecture for the implementation of the two-dimensional discrete wavelet transform (2D-DWT) oriented to FPGA devices

Marcos Martínez Peiró, Francisco José Ballester-Merelo, Rafael Gadea Gironés, 2004, Microprocess. Microsystems.

Implementing a Margolus Neighborhood Cellular Automata on a FPGA

Guillermo Payá Vayá, Rafael Gadea Gironés, Joaquín Cerdá, 2009, IWANN.

The Role of the Embedded Memories in the Implementation of Artificial Neural Networks

Rafael Gadea Gironés, Vicente Herrero-Bosch, Angel Sebastia, 2000, FPL.

Evolutionary optimization of neural networks with heterogeneous computation: study and implementation

Rafael Gadea Gironés, Jorge D. Fe, Ramón José Aliaga, 2015, The Journal of Supercomputing.

Simulación de tipos de datos Arrays de systemVerilog

Rafael Gadea Gironés, 2016 .

Diseño práctico con FPGAs

Rafael Gadea Gironés, Miguel Ángel Larrea Torres, Ricardo José Colom Palero, 2000 .

On the Implementation of a Margolus Neighborhood Cellular Automata on FPGA

Rafael Gadea Gironés, Joaquín Cerdá, Vicente Herrero-Bosch, 2003, FPL.

A Tool for Implementing and Exploring SBM Models: Universal 1D Invertible Cellular Automata

Rafael Gadea Gironés, Joaquín Cerdá, Jorge Daniel Martínez, 2005, IWINAC.

Optimization of Deep Neural Networks Using SoCs with OpenCL

Rafael Gadea Gironés, Ricardo José Colom-Palero, Vicente Herrero-Bosch, 2018, Sensors.

A Novel FPGA Architecture of a 2-D Wavelet Transform

Rafael Gadea Gironés, Ricardo José Colom-Palero, Angel Sebastià-Cortés, 2006, J. VLSI Signal Process..

A 2D Positioning Application in PET Using ANNs

Rafael Gadea Gironés, Ramón José Aliaga, Jorge Daniel Martínez, 2009, Encyclopedia of Artificial Intelligence.

FPGA Implementation of Adaptive Non-linear Predictors for Video Compression

Rafael Gadea Gironés, Ricardo José Colom-Palero, Agustín Ramírez-Agundis, 2003, FPL.

Forward-Backward Parallelism in On-Line Backpropagation

Rafael Gadea Gironés, Antonio Mocholí Salcedo, 1999, IWANN.

FPGA Custom DSP for ECG Signal Analysis and Compression

Marcos Martínez Peiró, Francisco José Ballester-Merelo, Guillermo Payá Vayá, 2004, FPL.

FPGA Implementations of the RNR Cellular Automata to Model Electrostatic Field

Rafael Gadea Gironés, Angel Sebastià-Cortés, Joaquín Cerdá-Boluda, 2004, VECPAR.

An active methodology for teaching electronic systems design

Marcos Martínez Peiró, Rafael Gadea Gironés, Ricardo José Colom-Palero, 2006, IEEE Transactions on Education.

SoC-Based Implementation of the Backpropagation Algorithm for MLP

Ramón José Aliaga, Rafael Gadea Gironés, Ricardo José Colom-Palero, 2008, 2008 Eighth International Conference on Hybrid Intelligent Systems.

A wavelet-VQ system for real-time video compression

Rafael Gadea Gironés, Ricardo José Colom-Palero, Javier Díaz-Carmona, 2007, Journal of Real-Time Image Processing.

Máquina Mealy: Estilo de 3 procesos

Rafael Gadea Gironés, Rafael Gadea Gironés, 2011 .

FPGA Implementation of a Pipelined On-Line Backpropagation

Rafael Gadea Gironés, Ricardo José Colom-Palero, Angel Sebastià-Cortés, 2005, J. VLSI Signal Process..

Uso de colas de systemverilog

Rafael Gadea Gironés, 2019 .

Experimental Platform for Accelerate the Training of ANNs with Genetic Algorithm and Embedded System on FPGA

Rafael Gadea Gironés, Jorge D. Fe, Ramón José Aliaga, 2013, IWINAC.

Gestión del Proyecto

Rafael Gadea Gironés, Miguel Ángel Larrea Torres, Ricardo José Colom Palero, 2008 .

Approximate k-NN delta test minimization method using genetic algorithms: Application to time series

Rafael Gadea Gironés, Dusan Sovilj, Fernando Mateo, 2010, Neurocomputing.

UVM: radicador 2

Rafael Gadea Gironés, 2020 .

RCGA-S/RCGA-SP Methods to Minimize the Delta Test for Regression Tasks

Amaury Lendasse, Rafael Gadea Gironés, Dusan Sovilj, 2009, IWANN.

A Mixed Hardware/Software SOFM Training System

Rafael Gadea Gironés, Ricardo José Colom-Palero, Javier Díaz-Carmona, 2008, Computación y Sistemas.

Emisor Receptor de Infrarojos en DE2

Rafael Gadea Gironés, Miguel Ángel Larrea Torres, Ricardo José Colom Palero, 2008 .

Simulación de una FIFO IP

Rafael Gadea Gironés, Rafael Gadea Gironés, 2019 .

Artificial neural network implementation on a single FPGA of a pipelined on-line backpropagation

Francisco José Ballester-Merelo, Rafael Gadea Gironés, Joaquín Cerdá, 2000, Proceedings 13th International Symposium on System Synthesis.

Cosimulación Hardware- Software

Rafael Gadea Gironés, 2018 .

Sistema Híbrido Hardware/Software para el Entrenamiento de Redes SOFM

Rafael Gadea Gironés, Ricardo José Colom Palero, Agustín Ramírez Agundis, 2008 .

Uso de HDLs en Quartus II

Rafael Gadea Gironés, Miguel Ángel Larrea Torres, Ricardo José Colom Palero, 2008 .

codiseño: Uso de Tightly Coupled Memory Interface

Rafael Gadea Gironés, Rafael Gadea Gironés, 2016 .

Simulación Verilog, observación de resultados

Rafael Gadea Gironés, 2017 .

Incidence Position Estimation in a PET Detector Using a Discretized Positioning Circuit and Neural Networks

Rafael Gadea Gironés, Ramón José Aliaga, Jorge Daniel Martínez, 2007, IWANN.

Octree-based, GPU implementation of a continuous cellular automaton for the simulation of complex, evolving surfaces

Kazuo Sato, Rafael Gadea Gironés, Joaquín Cerdá, 2011, Comput. Phys. Commun..

SIMULACIÓN FSM: GENERACIÓN DE ESTÍMULO BÁSICO

Rafael Gadea Gironés, 2016 .

A hardware design of a massive-parallel, modular NN-based vector quantizer for real-time video coding

Rafael Gadea Gironés, Ricardo José Colom-Palero, Agustín Ramírez-Agundis, 2008, Microprocess. Microsystems.

SIMULACION FSM: Generación del reset

Rafael Gadea Gironés, 2016 .