Pawel Dabal

FPGA-based cryptosystem with combined stream-block cipher and digital chaos generator

Pawel Dabal, Ryszard Pelka, 2010, ICSES 2010 International Conference on Signals and Electronic Circuits.

A study on fast pipelined pseudo-random number generator based on chaotic logistic map

Pawel Dabal, Ryszard Pelka, R. Pelka, 2014, 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems.

Fast pipelined pseudo-random number generator in programmable SoC device

Pawel Dabal, Ryszard Pelka, 2014, 2014 International Conference on Signals and Electronic Systems (ICSES).

An efficient post-processing method for pipelined pseudo-random number generator in SoC-FPGA

Pawel Dabal, Ryszard Pelka, R. Pelka, 2015, 2015 22nd International Conference Mixed Design of Integrated Circuits & Systems (MIXDES).

A chaos-based pseudo-random bit generator implemented in FPGA device

Pawel Dabal, Ryszard Pelka, 2011, 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems.

Design and Implementation of a Random Number Generator on FPGA

Chandra Shekhar, Jorge Castiñeira Moreira, Pawel Dabal, 2015 .