Dongsoo Koh

An embedded 65nm CMOS low-IF 48MHz-to-1GHz dual tuner for DOCSIS 3.0

Tao Wu, Lin He, Takayuki Hayashi, 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

An Embedded 65 nm CMOS Baseband IQ 48 MHz–1 GHz Dual Tuner for DOCSIS 3.0

Tao Wu, Lin He, Takayuki Hayashi, 2010, IEEE Journal of Solid-State Circuits.

27.6 A 4GS/s 13b pipelined ADC with capacitor and amplifier sharing in 16nm CMOS

Xi Chen, Tao Wang, Rong Wu, 2016, 2016 IEEE International Solid-State Circuits Conference (ISSCC).

Polar Loop Transmitter for GSM / GPRS / EDGE (Invited Paper)

Dmitriy Rozenblit, K. Juan, Rajasekhar Pullela, 2005 .

A 265 mW, 225 MHz signal bandwidth, and <1-dB gain step software defined cable receiver front-end enabling ultra-HDTV in 28nm CMOS

Davide Guermandi, Han Yan, Silvian Spiridon, 2015, 2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).

An embedded 65 nm CMOS baseband IQ 48 MHz-1 GHz dual tuner for DOCSIS 3.0

Jianhong Xiao, Takayuki Hayashi, Bruce Currivan, 2009, IEEE Communications Magazine.

A dual-band tri-mode CDMA IF receiver with programmable channel-match filter

Yong He, K. Rampmeier, D. Yates, 2003, IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2003.

A 180 mW multistandard TV tuner in 28 nm CMOS

Xi Chen, Bo Shen, Xiaojing Xu, 2016, 2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits).