J.-P. Soininen

TripleS—a formal validation environment for functional specifications

J.-P. Soininen, J. Saarikettu, V. Veijalainen, 1997 .

A Configuration Locking Technique to Reduce the Configuration Overhead of Run-Time Reconfigurable Devices

Yang Qu, J.-P. Soininen, J. Nurmi, 2007, 2007 International Symposium on System-on-Chip.

Using multiple configuration controllers to reduce the reconfiguration overhead

Yang Qu, J.-P. Soininen, J. Nurmi, 2005, 2005 NORCHIP.

Using Constraint Programming to Achieve Optimal Prefetch Scheduling for Dependent Tasks on Run-Time Reconfigurable Devices

Jari Nurmi, Yang Qu, J.-P. Soininen, 2006, 2006 International Symposium on System-on-Chip.

Mappability estimate: a measure of the goodness of a processor-algorithm pair

J.-P. Soininen, J. Kreku, J. Soininen, 2003, Proceedings. 2003 International Symposium on System-on-Chip (IEEE Cat. No.03EX748).

Evaluating application mapping using network simulation

J.-P. Soininen, T. Salminen, 2003, Proceedings. 2003 International Symposium on System-on-Chip (IEEE Cat. No.03EX748).

Application of decision-making method for architecture selection of ADSL modem

J.-P. Soininen, S. Boumard, H. Heusala, 2001, Proceedings Euromicro Symposium on Digital Systems Design.

Evaluation of platform architecture performance using abstract instruction-level workload models

J.-P. Soininen, J. Kreku, T. Kauppi, 2004, 2004 International Symposium on System-on-Chip, 2004. Proceedings..

Providing network connectivity for small appliances: a functionally minimized embedded Web server

Petri Mähönen, Janne Riihijarvi, J.-P. Soininen, 2001, IEEE Commun. Mag..