Andreas Traber

Near-Threshold RISC-V Core With DSP Extensions for Scalable IoT Endpoint Devices

Luca Benini, Davide Rossi, Igor Loi, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

SIR10US: A tightly coupled elliptic-curve cryptography co-processor for the OpenRISC

Luca Benini, Hubert Kaeslin, Michael Gautschi, 2014, 2014 IEEE 25th International Conference on Application-Specific Systems, Architectures and Processors.

Preemptive Hardware Multitasking in ReconOS

Andreas Traber, Markus Happe, Ariane Keller, 2015, ARC.

Tailoring instruction-set extensions for an ultra-low power tightly-coupled cluster of OpenRISC cores

Luca Benini, Giovanni Agosta, Michele Scandale, 2015, 2015 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC).

A Dual-Mode NB-IoT and EC-GSM RF-SoC Achieving −128-dBm Extended-Coverage and Supporting OTDOA and A-GPS Positioning

Qiuting Huang, Matthias Korb, Andreas Traber, 2018, ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC).

PULPino: A RISC-V based single-core system

Luca Benini, Florian Zaruba, Michael Gautschi, 2015 .