Ludo Deferm

发表

Evaluation of non-linear modelling techniques for MOSFETs based on vectorial large-signal measurements

Dominique Schreurs, Servaas Vandenberghe, Bart Nauwelaers, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

Single Chip Or Hybrid System Integration

Ludo Deferm, Ivo Bolsens, Wojtek Maly, 1999, Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078).

A 25ns/byte-Programmable Low-Power SSI Flash Array with a New Low-Voltage Erase Scheme for Embedded Memory Applications

Ludo Deferm, Dirk Wellekens, Luc Haspeslagh, 1995 .

Design impact on drain multiplication latch-up triggering

Ludo Deferm, C. Claeys, H. Lebon, 1988 .

A SV/3.3V-compatible Flash E2PROM cell with a 4OOns/7Ops programming time for embedded memory applications

Ludo Deferm, Dirk Wellekens, L. Haspeslagh, 1993 .

Process and device design influence on the ESD performance of a fully silicided 0.25mm CMOS technology

Guido Groeseneken, Gonçal Badenes, Ludo Deferm, 1997 .

Technological challenges for silicon technologies

Cor Claeys, Ludo Deferm, 1996 .

The influence of the interface trap density on the performance of bipolar devices

S. Decoutere, Ludo Deferm, C. Claeys, 1989, Proceedings of the Bipolar Circuits and Technology Meeting.

Parasitic lateral bipolar transistors in CMOS

Robert Mertens, Ludo Deferm, Corneel Claeys, 1989 .

Integration difficulties and limitations in sub-0.25 /spl mu/m CMOS and CMOS-based technologies

Ludo Deferm, G. Badenes, 2000, 2000 22nd International Conference on Microelectronics. Proceedings (Cat. No.00TH8400).

HIM0S-a high efficiency flash E/sup 2/PROM cell for embedded memory applications

Guido Groeseneken, Ludo Deferm, Dirk Wellekens, 1993 .

Bonding techniques for single crystal TFT AMLCDs

Ludo Deferm, Philippe Jansen, Maarten Rosmeulen, 1996, Photonics West - Micro and Nano Fabricated Electromechanical and Optical Components.

Integration challenges in sub-0.25 μm CMOS-based technologies

Ludo Deferm, G Badenes, 2000 .

A 0.35 /spl mu/m BiCMOS technology with 50 GHz Fmax selective epitaxial base transistors for RF applications

S. Decoutere, Ludo Deferm, Matty Caymax, 1998, Proceedings of the 1998 Bipolar/BiCMOS Circuits and Technology Meeting (Cat. No.98CH36198).

Development of a RF large signal MOSFET model, based on an equivalent circuit, and comparison with the BSIM3v3 compact model

Dominique Schreurs, C. van Dinther, Ludo Deferm, 2002 .

Modeling the non-uniformity of base sheet resistivity at high currents in bipolar transistors

S. Decoutere, Ludo Deferm, Corneel Claeys, 1992 .

DC characteristics of submicrometer CMOS inverters operating over the whole temperature range of 4.2-300 K

Ludo Deferm, Gilbert Declerck, E. A. Gutierrez-D, 1992 .

A global description of the base current 1/f noise of polysilicon emitter bipolar transistors before and after hot-carrier stress

Cor Claeys, Eddy Simoen, Ludo Deferm, 1998 .

Method of programming a flash EEPROM memory cell optimization of low power consumption and method of erasing this cell

Ludo Deferm, Herman Maes, Luc Haspeslagh, 1996 .

A 1Mbit HIMOS? flash memory embedded in a 0.35? m CMOS process

Ludo Deferm, Dirk Wellekens, Paul Hendrickx, 2000 .

Latch-up in a BiCMOS technology

S. Decoutere, Ludo Deferm, C. Claeys, 1988, Technical Digest., International Electron Devices Meeting.

Vectorial large signal RF for complete MOSFET model verification in time and frequency domain

Dominique Schreurs, E. Vandamme, C. van Dinther, 2000 .

On the optimisation of outside spacer bipolar transistors for 0.5 μm high performance mixed analog/digital BiCMOS

S. Decoutere, Ludo Deferm, A. Cuthbertson, 1996 .

CMOS options for single chip applications

Edgard Laes, Ludo Deferm, Livio Baldi, 1999, IEEE Micro.

Two- and three-dimensional calculation of substrate resistance

C. Claeys, Ludo Deferm, Gilbert Declerck, 1988 .

A new method for measuring the saturation velocity of submicron CMOS transistors

Ludo Deferm, R. J. Schreutelkamp, 1995 .

Impact of polysilicon emitter interfacial layer engineering on the 1/f noise of bipolar transistors

Eddy Simoen, S. Decoutere, C. Claeys, 1996 .

Investigation of the high frequency noise figure reduction of SiGe heterojunction bipolar transistors using actualised physical models

Johan Nijs, Ludo Deferm, Stefaan Decoutere, 1995 .

Analysis of the enhanced hot-electron injection in split-gate transistors useful for EEPROM applications

Guido Groeseneken, Ludo Deferm, J. Van Houdt, 1992 .

Influence Of Well Profile And Gate Length On The ESD Performance Of A Fully Silicided 0.25/spl mu/m Cmos Technology

Guido Groeseneken, Ludo Deferm, Christian Russ, 1997 .

Performance and reliability aspects of FOND: a new deep submicron CMOS device concept

P. Habas, Guido Groeseneken, Ludo Deferm, 1996 .

The influence of the drain multiplication current on latchup behavior

C. Claeys, Ludo Deferm, H. Lebon, 1988 .

Edge effects on polyoxide capacitors

Ludo Deferm, L. Haspeslagh, G. Vanhorebeek, 1993 .

Anomalous latch-up behaviour of CMOS at liquid helium temperatures

Eddy Simoen, B. Dierickx, Ludo Deferm, 1990 .

Influence of well profile and gate length on the ESD performance of a fully silicided 0.25 μm CMOS technology

Guido Groeseneken, Ludo Deferm, Christian Russ, 1998, IEEE Transactions on Components, Packaging, and Manufacturing Technology: Part C.

Polysilicon Encapsulated LOCOS for Deep Submicron CMOS Lateral Isolation

Rita Rooyackers, Ludo Deferm, Ingrid De Wolf, 1996 .