Thomas Hollstein

Klaus Hofmann, Thomas Hollstein, Siavoosh Payandeh Azad, 2015, 2015 IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits & Systems.

A hardware/software co-design reconfigurable Network-on-Chip FPGA emulation method

Klaus Hofmann, Thomas Hollstein, Haoyuan Ying, 2014, 2014 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC).

Trends and challenges for the design of integrated microelectronic communication systems

Manfred Glesner, Thomas Hollstein, Lukusa D. Kabulepa, 2001 .

Hardware/software co-design für eingebettete Systeme in der Informationstechnik

Manfred Glesner, Thomas Hollstein, Andreas Kirschbaum, 1999 .

SoCDep2: A framework for dependable task deployment on many-core systems under mixed-criticality constraints

Jaan Raik, Peeter Ellervee, Thomas Hollstein, 2016, 2016 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC).

Evaluation and Run-Time Optimization of On-chip Communication Structures in Reconfigurable Architectures

Alberto García Ortiz, Manfred Glesner, Tudor Murgan, 2003, FPL.

Pipelined Control-Path Effects on Area and Performance of a Wormhole-Switched Network-on-Chip

Manfred Glesner, Thomas Hollstein, Faizal Arya Samman, 2009 .

Fast and optimized task allocation method for low vertical link density 3-Dimensional Networks-on-Chip based many core systems

Klaus Hofmann, Thomas Hollstein, Haoyuan Ying, 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).

From algorithms to hardware architectures: a comparison of regular and irregular structured IDCT algorithms

Thomas Hollstein, Claus Schneider, Jürgen Deicke, 1998, Proceedings Design, Automation and Test in Europe.

Adaptive and Deadlock-Free Tree-Based Multicast Routing for Networks-on-Chip

Manfred Glesner, Thomas Hollstein, Faizal Arya Samman, 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Hardware Based Rapid Prototyping

Manfred Glesner, Tudor Murgan, Thomas Hollstein, 2008, Wiley Encyclopedia of Computer Science and Engineering.

Dynamic quadrant partitioning adaptive routing algorithm for irregular reduced vertical link density topology 3-Dimensional Network-on-Chips

Klaus Hofmann, Thomas Hollstein, Haoyuan Ying, 2014, 2014 International Conference on High Performance Computing & Simulation (HPCS).

A Fast Congestion-Aware Flow Control Mechanism for ID-Based Networks-on-Chip with Best-Effort Communication

Klaus Hofmann, Thomas Hollstein, Haoyuan Ying, 2011, 2011 14th Euromicro Conference on Digital System Design.

Networks-On-Chip Based on Dynamic Wormhole Packet Identity Mapping Management

Manfred Glesner, Thomas Hollstein, Faizal Arya Samman, 2009, VLSI Design.

DICE: an interactive approach to hardware/software co-design of heterogeneous real-time systems

Thomas Hollstein, Glesner, Kirschbaum, 1998 .

Buffer-architecture exploration for routers in a hierarchical network-on-chip

Manfred Glesner, Heiko Zimmer, Thomas Hollstein, 2005, 19th IEEE International Parallel and Distributed Processing Symposium.

Software-Level TMR Approach for On-Board Data Processing in Space Applications

Görschwin Fey, Jaan Raik, Thomas Hollstein, 2018, 2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

IEEE 802.15.4 raadiopersonaalvõrgul põhinev tark valgustuse juhtimissüsteem. Smart LED Illumination Control System Based on an IEEE 802.15.4 Wireless Personal Area Network

Thomas Hollstein, Priit Ruberg, 2014 .

A Distributed DoS Detection Scheme for NoC-based MPSoCs

Cesar G. Chaves, Martha Johanna Sepúlveda, Thomas Hollstein, 2018, 2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC).

Entwurf und interaktive Hardware-Software-Partitionierung komplexer heterogener Systeme

Thomas Hollstein, 2001 .

Mixed-criticality NoC partitioning based on the NoCDepend dependability technique

Thomas Hollstein, Siavoosh Payandeh Azad, Behrad Niazmand, 2015, 2015 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC).

Deadlock-free generic routing algorithms for 3-dimensional Networks-on-Chip with reduced vertical link density topologies

Klaus Hofmann, Thomas Hollstein, Haoyuan Ying, 2013, J. Syst. Archit..

Rapid prototyping of an integrated testing and debugging unit

Manfred Glesner, Thomas Hollstein, Ralf Ludewig, 2004, Proceedings. 15th IEEE International Workshop on Rapid System Prototyping, 2004..

Challenges for future system-on-chip-design

Zebo Peng, Raimund Ubar, Manfred Glesner, 2001 .

Design and prototyping of embedded systems-on-chip for mechatronic systems

Clemens Schlachta, Manfred Glesner, Thomas Hollstein, 2002 .

Integrated design and test generation under internet based environment MOSCITO

Raimund Ubar, Zebo Peng, Wieslaw Kuzmicz, 2002, Proceedings Euromicro Symposium on Digital System Design. Architectures, Methods and Tools.

Runtime Contention and Bandwidth-Aware Adaptive Routing Selection Strategies for Networks-on-Chip

Manfred Glesner, Thomas Hollstein, Faizal Arya Samman, 2013, IEEE Transactions on Parallel and Distributed Systems.

A Framework for Comprehensive Automated Evaluation of Concurrent Online Checkers

Jaan Raik, Thomas Hollstein, Gert Jervan, 2015, 2015 Euromicro Conference on Digital System Design.

Communication-centric high level synthesis metrics for low vertical channel density 3-dimensional Networks-on-Chip

Klaus Hofmann, Thomas Hollstein, Haoyuan Ying, 2012, 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC).

High-Level Synthesis and Test in the MOSCITO-Based Virtual Laboratory

Raimund Ubar, Jaan Raik, Manfred Glesner, 2002 .

Advanced Method for Industry Related Education with an FPGA Design Self-Learning Kit

Norbert Wehn, Manfred Glesner, Thomas Hollstein, 1995, FPL.

Computer-aided design of fuzzy systems based on generic VHDL specifications

Manfred Glesner, Saman K. Halgamuge, Thomas Hollstein, 1996, IEEE Trans. Fuzzy Syst..

Hardware/software co-design: state-of-the-art and future directions

Michael Gasteier, Manfred Glesner, Thomas Hollstein, 1996 .

Design methodology for fault-tolerant heterogeneous MPSoC under real-time constraints

Thomas Hollstein, Gert Jervan, Mohsin Amin, 2012, 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC).

Proceedings of the 1st International Workshop on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2005, Montpellier, France, June 2005

Leandro Soares Indrusiak, Lionel Torres, Manfred Glesner, 2005, ReCoSoC.

Invited paper: Design criteria for dependable System-on-Chip architectures

Klaus Hofmann, Manfred Glesner, Thomas Hollstein, 2011, 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC).

Detecting and Mitigating Low-and-Slow DoS Attacks in NoC-based MPSoCs

Cesar G. Chaves, Martha Johanna Sepúlveda, Thomas Hollstein, 2019, 2019 14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC).

Neue Entwurfsverfahren beim System-on-Chip-Design

Manfred Glesner, Heiko Zimmer, Thomas Hollstein, 2005 .

Flexible Wormhole-Switched Network-on-chip with Two-Level Priority Data Delivery Service

Manfred Glesner, Thomas Hollstein, Faizal Arya Samman, 2009 .

Diagnosing DoS Attacks in NoC-based MPSoCs

Thomas Hollstein, Cesar Giovanni Chaves, Siavoosh Payandeh Azad, 2019 .

HiPART: a new hierarchical semi-interactive HW-/SW partitioning approach with fast debugging for real-time embedded systems

Jürgen Becker, Manfred Glesner, Thomas Hollstein, 1998, Proceedings of the Sixth International Workshop on Hardware/Software Codesign. (CODES/CASHE'98).

Logic-based implementation of fault-tolerant routing in 3D network-on-chips

Jaan Raik, Jose Flich, Thomas Hollstein, 2016, 2016 Tenth IEEE/ACM International Symposium on Networks-on-Chip (NOCS).

Wormhole cut-through switching: Flit-level messages interleaving for virtual-channelless network-on-chip

Manfred Glesner, Thomas Hollstein, Faizal Arya Samman, 2011, Microprocess. Microsystems.

Contention window adaptation to ensure airtime consumption fairness in multirate Wi-Fi networks

Vyacheslav Kharchenko, Thomas Hollstein, Anatoliy Gorbenko, 2014, The 10th International Conference on Digital Technologies 2014.

An asynchronous switch implementation for systems-on-a-chip

Peter Zipf, Manfred Glesner, Thomas Hollstein, 2004 .

Automatic generation of application specific fuzzy controllers for rapid-prototyping

Manfred Glesner, Saman K. Halgamuge, Thomas Hollstein, 1994, Proceedings of 1994 IEEE 3rd International Fuzzy Systems Conference.

Cross-Layer Dependability Management in Network on Chip based System on Chip. Kiipvõrkudel põhinevate süsteemide kihtideülene usaldatavuse haldus

Jaan Raik, Thomas Hollstein, Gert Jervan, 2018 .

A modular 6LoWPAN-based wireless sensor body area network for health-monitoring applications

Alar Kuusik, Kalle Tammemäe, Paul Annus, 2014, Signal and Information Processing Association Annual Summit and Conference (APSIPA), 2014 Asia-Pacific.

System-level optimization of NoC-based timing sensitive systems

Peeter Ellervee, Thomas Hollstein, Gert Jervan, 2011 .

Multicast Parallel Pipeline Router Architecture for Network-on-Chip

Manfred Glesner, Thomas Hollstein, Faizal Arya Samman, 2008, 2008 Design, Automation and Test in Europe.

Reconfigurable platforms for ubiquitous computing

Leandro Soares Indrusiak, Manfred Glesner, Tudor Murgan, 2004, CF '04.

A flexible connected data system for VHDL source code analysis, transformation and processing

Manfred Glesner, Wolfgang Ecker, Thomas Hollstein, 1999 .

Planar adaptive network-on-chip supporting deadlock-free and efficient tree-based multicast routing method

Manfred Glesner, Thomas Hollstein, Faizal Arya Samman, 2012, Microprocess. Microsystems.

Eksperimentaalse mehitamata õhusõiduki trajektoori planeerimine. Trajectory Planning for Experimental Unmanned Aerial Vehicle

Thomas Hollstein, Uljana Reinsalu, Karl Janson, 2016 .

Automated minimization of concurrent online checkers for Network-on-Chips

Jaan Raik, Thomas Hollstein, Gert Jervan, 2015, 2015 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC).

New Theory for Deadlock-Free Multicast Routing in Wormhole-Switched Virtual-Channelless Networks-on-Chip

Manfred Glesner, Thomas Hollstein, Faizal Arya Samman, 2011, IEEE Transactions on Parallel and Distributed Systems.

An Asynchronous Switch Implmentation for Systems-on-a-Chip

Manfred Glesner, Peter Zipf, Thomas Hollstein, 2004, MBMV.

Concept of a joint university/industry course for mixed-signal system-on-chip design

Jürgen Becker, Manfred Glesner, Thomas Hollstein, 2001, Proceedings 2001 International Conference on Microelectronic Systems Education.

From online fault detection to fault management in Network-on-Chips: A ground-up approach

Raimund Ubar, Jaan Raik, Thomas Hollstein, 2017, 2017 IEEE 20th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

High-level synthesis in a rapid-prototype environment for mechatronic systems

Norbert Wehn, Manfred Glesner, Thomas Hollstein, 1992, Proceedings EURO-DAC '92: European Design Automation Conference.

High-level synthesis applied to an ASIC emulation board

Manfred Glesner, N. Wehn, Thomas Hollstein, 1992, Proceedings Euro ASIC '92.

Erratum to Planar adaptive network-on-chip supporting deadlock-free and efficient tree-based multicast routing method Microprocessors and Microsystems (2012) 449-461

Manfred Glesner, Thomas Hollstein, Faizal Arya Samman, 2012, Microprocess. Microsystems.

Practicing start-up culture in teaching embedded systems

Kalle Tammemäe, Thomas Hollstein, Siavoosh Payandeh Azad, 2016, 2016 11th European Workshop on Microelectronics Education (EWME).

Flexible parallel pipeline network-on-chip based on dynamic packet identity management

Manfred Glesner, Thomas Hollstein, Faizal Arya Samman, 2008, 2008 IEEE International Symposium on Parallel and Distributed Processing.

Extended checkers for Logic-Based Distributed Routing in Network-on-Chips

Jaan Raik, Thomas Hollstein, Behrad Niazmand, 2014, 2014 14th Biennial Baltic Electronic Conference (BEC).

Contention aware scheduling for NoC-based real-time systems

Peeter Ellervee, Thomas Hollstein, Gert Jervan, 2011, 2011 NORCHIP.

Kahedimensiooniline veakindel marsruutimine võrk-kiibil baseeruvatel mitmiktuum arhitektuuridel. Fault-Tolerant 2D-Routing in Network-on-Chip based Many-Core Architectures

Thomas Hollstein, Siavoosh Payandeh Azad, 2014 .

Holistic Approach for Fault-Tolerant Network-on-Chip based Many-Core Systems pdf

Jaan Raik, Thomas Hollstein, Siavoosh Payandeh Azad, 2016, ArXiv.

A genetic algorithm based optimization method for low vertical link density 3-dimensional Networks-on-Chip many core systems

Klaus Hofmann, Thomas Hollstein, Kris Heid, 2012, NORCHIP 2012.

Architecture, on-chip network and programming interface concept for multiprocessor system-on-chip

Thomas Hollstein, Faizal Arya Samman, Björn Dollak, 2016, 2016 International Conference on Smart Green Technology in Electrical and Information Systems (ICSGTEIS).

An Efficient FPGA-based Architecture for Contractive Autoencoders

Thomas Hollstein, Jaan Raik, Madis Kerner, 2020, 2020 IEEE 28th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM).

Entwurfsverfahren für eingebettete Hardware/Software Systems-on-Chip

Manfred Glesner, Thomas Hollstein, R. Ludewig, 2002 .

Rapid-Prototyping von anwendungsspezifischen Fuzzy Controllern mit Field Programmable Gate Arrays

Manfred Glesner, Saman K. Halgamuge, Thomas Hollstein, 1994, Fuzzy Days.

Efficient and Deadlock-Free Tree-Based Multicast Routing Methods for Networks-on-Chip (NoC)

Thomas Hollstein, Faizal Arya Samman, 2014 .

Object-oriented Specification Approach for Synthesis of Hardware-/Software Systems

Jürgen Becker, Manfred Glesner, Thomas Hollstein, 1999, MBMV.

Deadlock-free routing and component placement for irregular mesh-based networks-on-chip

Manfred Glesner, Heiko Zimmer, Thomas Hollstein, 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..

A prototyping environment for fuzzy controllers

Manfred Glesner, Thomas Hollstein, Andreas Kirschbaum, 1997, FPL.

Automated area and coverage optimization of minimal latency checkers

Jaan Raik, Thomas Hollstein, Siavoosh Payandeh Azad, 2017, 2017 22nd IEEE European Test Symposium (ETS).

GSNoC — The comprehensive design platform for 3-dimensional Networks-on-Chip based many core embedded systems

Klaus Hofmann, Thomas Hollstein, Haoyuan Ying, 2013, 2013 International Conference on High Performance Computing & Simulation (HPCS).

Novel Architectures for Contractive Autoencoders with Embedded Learning

Thomas Hollstein, Jaan Raik, Madis Kerner, 2020, 2020 17th Biennial Baltic Electronics Conference (BEC).

Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques

Leandro Soares Indrusiak, Manfred Glesner, Tudor Murgan, 2005, SAMOS.

Triple Fixed-Point MAC Unit for Deep Learning

Jaan Raik, Kalle Tammemäe, Thomas Hollstein, 2021, 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Lightweight Monitoring Scheme for Flooding DoS Attack Detection in Multi-Tenant MPSoCs

Cesar G. Chaves, Martha Johanna Sepúlveda, Thomas Hollstein, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

Planar Adaptive Router Microarchitecture for Tree-Based Multicast Network-on-Chip

Manfred Glesner, Thomas Hollstein, Faizal A. Samman, 2008 .

A Framework for Area-Efficient Concurrent Online Checkers Design

Jaan Raik, Thomas Hollstein, Gert Jervan, 2015 .

A modular 6LoWPAN-based wireless sensor body area network for health-monitoring applications

Alar Kuusik, Kalle Tammemäe, Paul Annus, 2015 .