Mehrnaz Ahmadi

A Dynamic Timing Error Avoidance Technique Using Prediction Logic in High-Performance Designs

Sahand Salamat, Bijan Alizadeh, Mehrnaz Ahmadi, 2019, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A novel technique to detect Aging in analog/mixed-signal circuits

Mehrnaz Ahmadi, Rasoul Jafari, 2016, 2016 IEEE East-West Design & Test Symposium (EWDTS).

A Hybrid Time Borrowing Technique to Improve the Performance of Digital Circuits in the Presence of Variations

Behjat Forouzandeh, Bijan Alizadeh, Mehrnaz Ahmadi, 2017, IEEE Transactions on Circuits and Systems I: Regular Papers.

Systematic approximate logic optimization using don't care conditions

Masahiro Fujita, Sahand Salamat, Bijan Alizadeh, 2017, 2017 18th International Symposium on Quality Electronic Design (ISQED).

A Timing Error Mitigation Technique for High Performance Designs

Behjat Forouzandeh, Bijan Alizadeh, Mehrnaz Ahmadi, 2015, 2015 IEEE Computer Society Annual Symposium on VLSI.