Manisha Gambhir

A 0.8 ps DNL Time-to-Digital Converter With 250 MHz Event Rate in 65 nm CMOS for Time-Mode-Based $\Sigma \Delta$ Modulator

Edgar Sánchez-Sinencio, José Silva-Martínez, Mohamed M. Elsayed, 2011, IEEE Journal of Solid-State Circuits.

Low power filtering techniques for wideband and wireless applications

Manisha Gambhir, 2009 .

A low power 1.3GHz dual-path current mode Gm-C filter

Edgar Sánchez-Sinencio, José Silva-Martínez, Vijay Dhanasekaran, 2008, 2008 IEEE Custom Integrated Circuits Conference.

A 1.1 GHz Fifth Order Active-LC Butterworth Type Equalizing Filter

Edgar Sánchez-Sinencio, José Silva-Martínez, Vijay Dhanasekaran, 2007, IEEE Journal of Solid-State Circuits.

Low-Power Architecture and Circuit Techniques for High-Boost Wide-Band $G_m$–$C$ Filters

Edgar Sánchez-Sinencio, José Silva-Martínez, Vijay Dhanasekaran, 2007, IEEE Transactions on Circuits and Systems I: Regular Papers.

A 20MHz BW 68dB DR CT ΔΣ ADC based on a multi-bit time-domain quantizer and feedback element

Edgar Sánchez-Sinencio, José Silva-Martínez, Lei Chen, 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

A Continuous Time Multi-Bit $\Delta \Sigma$ ADC Using Time Domain Quantizer and Feedback Element

Edgar Sánchez-Sinencio, José Silva-Martínez, Lei Chen, 2011, IEEE Journal of Solid-State Circuits.