Sanghyeon Baeg

发表

Analytical test buffer design for differential signaling I/O buffers by error syndrome analysis

Sung Soo Chung, Sanghyeon Baeg, 2005, IEEE Trans. Very Large Scale Integr. Syst..

Soft Error Issues with Scaling Technologies

Sanghyeon Baeg, Sang Hoon Jeon, Soonyoung Lee, 2012, 2012 IEEE 21st Asian Test Symposium.

Single Event Resilient Dynamic Logic Designs

Rui Liu, Shi-Jie Wen, Haibin Wang, 2014, J. Electron. Test..

An alternative approach to measure alpha-particle-induced SEU cross-section for flip-chip packaged SRAM devices: High energy alpha backside irradiation

Sanghyeon Baeg, Soonyoung Lee, Saqib A. Khan, 2017, Microelectron. Reliab..

A $di/dt$ Compensation Technique in Delay Testing by Disconnecting Power Pins

Sanghyeon Baeg, 2009, IEEE Transactions on Instrumentation and Measurement.

Clocked Low Power Rail-to-Rail Sense Amplifier for Ternary Content Addressable Memory (TCAM) Application

Sanghyeon Baeg, Soonyoung Lee, Chulseung Lim, 2012 .

Low Power Configuration Strategy of TCAM Lookup Table

Sanghyeon Baeg, 2008, IEICE Trans. Commun..

A cost-effective design for testability: clock line control and test generation using selective clocking

Sanghyeon Baeg, William A. Rogers, 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Signal characteristic and test exploitation for intermittent nanometer-scale cracks

Sanghyeon Baeg, Hosung Lee, 2018, Microelectron. Reliab..

Experiments and root cause analysis for active-precharge hammering fault in DDR3 SDRAM under 3 × nm technology

Kyungbae Park, Sanghyeon Baeg, Chul Seung Lim, 2016, Microelectron. Reliab..

Vertically Partitioned SRAM-Based Ternary Content Addressable Memory

Zahid Ullah, Sanghyeon Baeg, 2012 .

A new test generation methodology using selective clocking for the clock line controlled circuits

Sanghyeon Baeg, William A. Rogers, 1994, Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors.

Mitigating the effects of large multiple cell upsets (MCUs) in memories

Shi-Jie Wen, Pedro Reviriego, Juan Antonio Maestro, 2011, TODE.

A new design for testability method: Clock line control design

Sanghyeon Baeg, W. A. Rogers, 1993, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '93.

Efficient Interconnect Test Patterns for Crosstalk and Static Faults

Jaehoon Song, Sungju Park, Pyoungwoo Min, 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Soft error tolerant Content Addressable Memories (CAMs) using error detection codes and duplication

Shi-Jie Wen, Pedro Reviriego, Juan Antonio Maestro, 2013, Microprocess. Microsystems.

Study of proton radiation effect to row hammer fault in DDR4 SDRAMs

Shi-Jie Wen, Kyungbae Park, Sanghyeon Baeg, 2018, Microelectron. Reliab..

Logic soft error study with 800-MHz DDR3 SDRAMs in 3x nm using proton and neutron beams

Shi-Jie Wen, Kyungbae Park, Sanghyeon Baeg, 2015, 2015 IEEE International Reliability Physics Symposium.

Null Detector Circuit Design Scheme for Detecting Defective AC-Coupled Capacitors in Differential Signaling

Sanghyeon Baeg, 2009, IEEE Transactions on Instrumentation and Measurement.

Characterizing the Capacitive Crosstalk in SRAM Cells Using Negative Bit-Line Voltage Stress

Sungju Park, Sanghyeon Baeg, Jongsun Bae, 2012, IEEE Transactions on Instrumentation and Measurement.

Analysis of Low Power Sensor Node Using Data Compression

Sanghyeon Baeg, Sangwook Ahn, Hyo-deok Shin, 2009 .

Failure signature analysis of power-opens in DDR3 SDRAMs

Sanghyeon Baeg, Hosung Lee, Tan Li, 2018, Microelectron. Reliab..

Statistical distributions of row-hammering induced failures in DDR3 components

Kyungbae Park, Sanghyeon Baeg, Donghyuk Yun, 2016, Microelectron. Reliab..

Hybrid Partitioned SRAM-Based Ternary Content Addressable Memory

Zahid Ullah, Sanghyeon Baeg, Kim Ilgon, 2012, IEEE Transactions on Circuits and Systems I: Regular Papers.

A temporal design for testability and test generation using selective clocking

Sanghyeon Baeg, 1994 .

Delay Fault Coverage Enhancement by Partial Clocking for Low-Power Designs With Heavily Gated Clocks

Sanghyeon Baeg, 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

AC-JTAG: empowering JTAG beyond testing DC nets

Sung Soo Chung, Sanghyeon Baeg, 2001, Proceedings International Test Conference 2001 (Cat. No.01CH37260).

Design of Area Efficient High Resolution CMOS Vernier Delay Line Cell

Sanghyeon Baeg, Soonyoung Lee, Sangwook Ahn, 2010 .

Study of TID effects on one row hammering using gamma in DDR4 SDRAMs

Sanghyeon Baeg, Chul Seung Lim, Donghyuk Yun, 2018, 2018 IEEE International Reliability Physics Symposium (IRPS).

Architectural design tradeoffs in SRAM-based TCAMs

Ali Ahmed, Sanghyeon Baeg, Naeem Maroof, 2019, IEICE Electron. Express.

Designing ad-hoc scrubbing sequences to improve memory reliability against soft errors

Pedro Reviriego, Juan Antonio Maestro, Sanghyeon Baeg, 2011, 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC).

Enhancing temporal testability and its effects on design and test generation

Sanghyeon Baeg, W. A. Rogers, 1994, Proceedings of 3rd International Workshop on the Economics of Design, Test and Manufacturing.

Ternary Content Addressable Memory를 위한 저 전력 Rail-to-Rail 감지 증폭기 (C locked Low Power Rail-to-Rail Sense Amplifier for Ternary Content Addressable Memory (TCAM) Application )

Sanghyeon Baeg, Soonyoung Lee, Chulseung Lim, 2012 .

Assessing alpha-particle-induced SEU sensitivity of flip-chip bonded SRAM using high energy irradiation

Shi-Jie Wen, Sanghyeon Baeg, Saqib A. Khan, 2016, IEICE Electron. Express.

An Efficient Multiple Cell Upsets Tolerant Content-Addressable Memory

Sungju Park, Sanghyeon Baeg, Soonyoung Lee, 2014, IEEE Transactions on Computers.

Minimizing Soft Errors in TCAM Devices: A Probabilistic Approach to Determining Scrubbing Intervals

Shi-Jie Wen, Sanghyeon Baeg, Richard Wong, 2010, IEEE Transactions on Circuits and Systems I: Regular Papers.

Temporal and frequency characteristic analysis of margin-related failures caused by an intermittent nano-scale fracture of the solder ball in a BGA package device

Shi-Jie Wen, Sanghyeon Baeg, Hosung Lee, 2017, Microelectron. Reliab..

Fault Coverage Re-Evaluation of Memory Test Algorithms With Physical Memory Characteristics

Sanghyeon Baeg, Kiseok Lee, Jeonghwan Kim, 2021, IEEE Access.

DDR4 Data Channel Failure Due to DC Offset Caused by Intermittent Solder Ball Fracture in FBGA Package

Junhyeong Kwon, Sanghyeon Baeg, Geunyong Bak, 2021, IEEE Access.

Exploitations of Multiple Rows Hammering and Retention Time Interactions in DRAM Using X-Ray Radiation

Sanghyeon Baeg, Donghyuk Yun, Geunyong Bak, 2021, IEEE Access.

Active Precharge Hammering to Monitor Displacement Damage Using High-Energy Protons in 3x-nm SDRAM

Kyungbae Park, Sanghyeon Baeg, Chulseung Lim, 2017, IEEE Transactions on Nuclear Science.

Stuck Bits Study in DDR3 SDRAMs Using 45-MeV Proton Beam

Sanghyeon Baeg, Richard Wong, Chulseung Lim, 2015, IEEE Transactions on Nuclear Science.

Comparative study of MC-50 and ANITA neutron beams by using 55 nm SRAM

Sanghyeon Baeg, Soonyoung Lee, S. Baeg, 2012 .