Denis Flandre

Denis Flandre, Valeriya Kilchytska, Ligia d'Oliveira, 2018, 2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS).

Can we connect trillions of IoT sensors in a sustainable way? A technology/circuit perspective (Invited)

David Bol, Denis Flandre, Guerric de Streel, 2015, 2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

High-temperature SOI technology

Denis Flandre, Jean-Pierre Colinge, 1994 .

Multilevel Half-Rate Detector for Clock and Data Recovery Circuits

David Bol, Denis Flandre, Cecilia Gimeno Gasca, 2018 .

Magnetic sensors enabled by MEMS and SOI technologies

Denis Flandre, Sylvain Druart, Laurent Francis, 2012 .

Analog/RF, sensors and MEMS in SOI: demos and performance assessment

David Bol, Denis Flandre, Laurent Francis, 2015 .

Demonstrating an LPPN Processor

David Bol, Denis Flandre, François-Xavier Standaert, 2018, ASHES@CCS.

Measurement and modeling of thin-film accumulation-mode SOI p-MOSFET intrinsic gate capacitances

Denis Flandre, Jean-Pierre Colinge, B. Gentinne, 1996 .

Performances Evaluation of On-Chip Large-Size-Tapped Transformer for MEMS Applications

Denis Flandre, Laurent Francis, Libor Rufer, 2020, IEEE Transactions on Instrumentation and Measurement.

Analysis of Dynamic Differential Swing Limited Logic for Low-Power Secure Applications

David Bol, Denis Flandre, François-Xavier Standaert, 2012 .

On the gm/ID-based Threshold Voltage Extractions in Advanced SOI MOSFETs

Denis Flandre, Jean-Pierre Raskin, Tamara Rudenko, 2013 .

Analog design in SOI for hostile environments and high temperatures

Denis Flandre, Valeriya Kilchytska, José Joaquin Alvarado Pulido, 2014 .

Diamond layout style impact on SOI MOSFET in high temperature environment

Denis Flandre, Christian Renaux, Salvador Pinillos Gimenez, 2015, Microelectron. Reliab..

Analog performance of graded-channel SOI nMOSFETs at low temperatures

Denis Flandre, Marcelo Antonio Pavanello, Joao Antonio Martino, 2002 .

SOI CMOS technology for high-temperature microsystems

Denis Flandre, 1998 .

Analysis and minimization of practical energy in 45nm subthreshold logic circuits

David Bol, Denis Flandre, Jean-Didier Legat, 2008, 2008 IEEE International Conference on Computer Design.

Artificial microbeams to sense air flow, temperature or humidity combining MEMS and CMOS technologies

Denis Flandre, Jean-Pierre Raskin, Nicolas André, 2008 .

Building Ultra-Low-Power Low-Frequency Digital Circuits with High-Speed Devices

David Bol, Denis Flandre, Jean-Didier Legat, 2007, 2007 14th IEEE International Conference on Electronics, Circuits and Systems.

A novel CMOS memory cell architecture for ultra-low power applications operating up to 280°C

Denis Flandre, David Levacq, Vincent Dessard, 2003 .

Fluid characterization by interdigitated electrodes sensors

Denis Flandre, Sylvain Druart, Laurent Francis, 2009 .

Analysis, Modeling, and Design of a 2.45-GHz RF Energy Harvester for SWIPT IoT Smart Sensors

David Bol, Denis Flandre, Pengcheng Xu, 2019, IEEE Journal of Solid-State Circuits.

Impact of the Graded-Channel Architecture on Double Gate Transistors for High-Performance Analog Applications

Denis Flandre, Marcelo Antonio Pavanello, Jean-Pierre Raskin, 2003 .

Switched-capacitor DC/DC converters for empowering Internet-of-Things SoCs

David Bol, Denis Flandre, Julien De Vos, 2014, 2014 IEEE Faible Tension Faible Consommation.

Designing robust subthreshold and ultra-low-voltage mixed-signal circuits against progress variations, temperature and radiation effects

David Bol, Denis Flandre, 2014 .

Advantages and Challenges of Advanced MOSFETs for Analog and RF Applications

Denis Flandre, Jean-Pierre Raskin, Sergej Makovejev, 2014 .

Improved DIBL in Ultra Thin Body SOI MOSFETs with Ultra Thin Buried Oxide and inverted substrate

O. Faynot, Denis Flandre, Jean-Pierre Raskin, 2010 .

La tecnologia CMOS sobre SOI (Silicon-on-Insulator) para aplicaciones analògico-digitales da baja tensiòn y bajo consumo

Denis Flandre, Fernando Silveira, Paul Jespers, 1995 .

Time jitter effect of control circuit on high-Q switched-capacitor filter for radio-communication applications

Denis Flandre, Ahmed El Oualkadi, Jean-Marie Paillot, 2008 .

Study of Matching Properties of Graded-Channel SOI MOSFETs

Denis Flandre, Marcelo Antonio Pavanello, Michelly de Souza, 2008 .

Wide Frequency Band Characterization

Denis Flandre, Jean-Pierre Raskin, Valeriya Kilchytska, 2010 .

Branch-Based Design of Carry Calculation Cell for Ultra-Low Power and High-Temperature Applications

Denis Flandre, Jean-Didier Legat, Ilham Hassoune, 2004 .

A new multi-valued current-mode adder based on negative-differential resistance using ULP diodes

David Bol, Denis Flandre, Ilham Hassoune, 2005 .

A 110 nA pacemaker sensing channel in CMOS on silicon-on-insulator

Denis Flandre, Fernando Silveira, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

SOI solutions for HF applications

Denis Flandre, Concepción Aldea, Santiago Celma, 2000 .

SOI Technology: A viable alternative to bulk CMOS

Denis Flandre, 2004 .

Silicon-On-lnsulator (SOI) Solutions for Automotive Applications

Denis Flandre, Vincent Dessard, Laurent Demeûs, 2002 .

Study and Implementation of a wireless accelerometer network for gait analysis

Denis Flandre, Pierre Gérard, Benoît Macq, 2008 .

Investigation Of Charge Control-Related Performances In Double-Gate SOI MOSFETs

Denis Flandre, Jean-Pierre Raskin, Valeriya Kilchytska, 2003 .

Characterization of Quantum Efficiency and Effective Lifetime in Thin Ungated SOI Lateral PIN Photodiodes in the UV-Range

Denis Flandre, Aryan Afzalian, Tom Torfs, 2006 .

25 to 300 degrees C ultra-low-power voltage reference compatible with standard SOICMOS process

Denis Flandre, Stéphane Adriaensen, Vincent Dessard, 2002 .

Potential of surface accumulation mode for deep-submicron fully-depleted SOI CMOS technologies

Denis Flandre, Benjamin Iniguez, E. Rauly, 2001 .

Dual-Mode Switched-Capacitor DC-DC Converter for Subthreshold Processors with Deep Sleep Mode

David Bol, Julien De Vos, Denis Flandre, 2010 .

Ultra Low Power Analog Basic Blocks

Denis Flandre, Stéphane Adriaensen, Vincent Dessard, 2001 .

Méthodologie gm/ID: un chaînon entre l'analyse symbolique et la synthèse de circuits analogiques basse puissance

Denis Flandre, 2002 .

High-temperature sigma-delta modulator in thin-film fully-depleted SOI technology

Denis Flandre, A. Viviani, Paul Jespers, 1999 .

SOI CMOS sensors, transistors and circuits for ultra-low-power and harsh environment applications

Denis Flandre, 2014 .

Disruptive ultra-low-leakage design techniques for ultra-low-power CMOS circuits

David Bol, Denis Flandre, Pierre-Antoine Haddad, 2012 .

Al/Al2O3 Biosensors for DNA and Medical Applications: Materials and Design Concepts, Methodology and Perspectives

Denis Flandre, Sylvain Druart, Luis Moreno Hagelsieb, 2007 .

Innovating SOI memory devices based on floating-body effects

Denis Flandre, Sorin Cristoloveanu, Maryline Bawedin, 2007 .

FD MOS SOI CIRCUIT TO IMPROVE THE THRESHOLD OF DETECTION OF A CO-INTEGRATED AMORPHOUS PHOTODIODE.

Denis Flandre, Aryan Afzalian, Magali Estrada, 2002 .

Floating-Body Memory: Concepts, Physics and Challenges

Denis Flandre, Sorin Cristoloveanu, Florin Udrea, 2009 .

Glitch-induced within-die variations of dynamic energy in voltage-scaled nano-CMOS circuits

David Bol, Denis Flandre, Dina Kamel, 2010, 2010 Proceedings of ESSCIRC.

New empirical model for leakage drain current of SOI MOSFETs valid from room to high temperatures

Denis Flandre, Joao Antonio Martino, Marcello Bellodi, 1996 .

A fast and robust algorithm to assess respiratory frequency in real-time

Denis Flandre, Laurent Francis, Jean-Pierre Raskin, 2010 .

Design of an Ultra-Low-Power Multi-Stage AC/DC Voltage Rectifier and Multiplier Using a Fully-Automated and Portable Design Methodology

Denis Flandre, Pierre-Antoine Haddad, Geoffroy Gosset, 2012, J. Low Power Electron..

Analysis and Specification of an IR-UWB Transceiver for High-Speed Chip-to-Chip Communication in a Server Chassis

David Bol, Denis Flandre, Cecilia Gimeno, 2018, IEEE Transactions on Circuits and Systems I: Regular Papers.

Part 1: Design of low-voltage low-power CMOS analog building blocks and OTAs using EKV modelling and gm/ID methodology in bulk and SOI technologies

Denis Flandre, 2000 .

SOI Technology for Harsh Environment Applications

Denis Flandre, Valeriya Kilchytska, Laurent Vancaillie, 2008 .

Ultra-thin body and thin-BOX SOI CMOS technology analog figures of merit

O. Faynot, Denis Flandre, Jean-Pierre Raskin, 2012 .

Comparison of SOI versus bulk performances of CMOS micropower single-stage OTAs

Denis Flandre, J. P. Eggermont, Paul Jespers, 1994 .

Class AB Micropower Operational Amplifiers

Denis Flandre, Fernando Silveira, 2004 .

Power-delay product minimization in high-performance 64-bit carry-select adders

Denis Flandre, Helmut Schettler, Thomas Ludwig, 2004, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Physical analysis of the high-temperature subthreshold slope in SOI MOSFETs

Denis Flandre, Jean-Pierre Colinge, Tamara Rudenko, 2000, 2000 IEEE International SOI Conference. Proceedings (Cat. No.00CH37125).

Transconductance and mobility behaviors in UTB SOI MOSFETs with standard and thin BOX

Denis Flandre, O. Faynot, Jean-Pierre Raskin, 2009 .

Self-Cascode SOI versus Graded-Channel SOI MOS Transistors for Low-Voltage Applications

Denis Flandre, Santiago Celma, Belén Calvo, 2006 .

NANOTIC, Walloon programme of excellence at UCL

Denis Flandre, 2007 .

Modelling and application of fully depleted SOI MOSFETs for low voltage, low power analogue CMOS circuits

Denis Flandre, Jean-Pierre Colinge, Paul Jespers, 1996 .

Introduction of the SOI MOSFET dimensions in the high-temperature leakage drain current model

Denis Flandre, Joao Antonio Martino, Marcello Bellodi, 1996 .

Continuous or discontinuous SOI films : a designer's point of view

Denis Flandre, Paul Jespers, P. J. Verlinden, 1988 .

Experimental Validation of the Drain Current Analytical Model of the Fully Depleted Diamond SOI nMOSFETs by Using Paired T-test Statistical Evaluation

Denis Flandre, Christian Renaux, Salvador Pinillos Gimenez, 2012 .

High Temperature SOI CMOS Low Power circuits and micro systems for MEMS co-integrated interfaces, temperature sensing and power management applications

Denis Flandre, Jean-Pierre Raskin, Benoit Olbrechts, 2009 .

Ultra low power flow-to-frequency SOI MEMS transducer

Denis Flandre, Laurent Francis, Jean-Pierre Raskin, 2010 .

Gain improvement in operational transconductance amplifiers using Graded-Channel SOI nMOSFETS

Denis Flandre, Marcelo Antonio Pavanello, João Antonio Martino, 2006, Microelectron. J..

Learning with Physical Noise or Errors

Denis Flandre, François-Xavier Standaert, Dina Kamel, 2020, IEEE Transactions on Dependable and Secure Computing.

Figures-of-Merit Of Intrinsic, Standard-Doped And Graded-Channel SOI And SOS MOSFETs For Analog Baseband And RF Applications

Denis Flandre, Jean-Pierre Raskin, Morin Dehan, 2003 .

Recent Advances in SOI MOSFET Devices and Circuits for Ultra-Low Power / High Temperature Applications

Denis Flandre, David Levacq, Vincent Dessard, 2004 .

Unified 1/f noise SOI MOSFET modelling for circuit simulation

Denis Flandre, Benjamin Iniguez, Vincent Dessard, 1997 .

The effects of gamma irradiation on micro-hotplates with integrated temperature sensing diodes

Denis Flandre, Florin Udrea, Nicolas André, 2014, Sensing Technologies + Applications.

Assessment of 28 nm UTBB FD-SOI technology platform for RF applications: Figures of merit and effect of parasitic elements

Denis Flandre, Jean-Pierre Raskin, V. Barral, 2016 .

Assessment of advanced SOI CMOS technologies for high-temperature applications

Denis Flandre, Valeriya Kilchytska, 2007 .

Versatile high performance Voltage Regulator for high temperature applications

Denis Flandre, Vincent Dessard, Pierre Delatte, 2003 .

8-T ULV SRAM macro in 28nm FDSOI with 7.4 pW/bit retention power and back-biased-scalable speed/energy trade-off

David Bol, Denis Flandre, Thomas Haine, 2018, 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

Back-gate bias effect on UTBB-FDSOI non-linearity performance

Denis Flandre, Michel Haond, Jean-Pierre Raskin, 2017, 2017 47th European Solid-State Device Research Conference (ESSDERC).

Impact of Self-Heating on UTB MOSFET Parameters

O. Rozeau, Denis Flandre, Jean-Pierre Raskin, 2014 .

Potential of SOI Technology for Low-Voltage Micropower Biomedical Applications

Denis Flandre, Fernando Silveira, 2004 .

Gate-All-Around Technology for Harsh Environment Applications

Denis Flandre, Jean-Pierre Colinge, A. Vandooren, 1999 .

Integrated sensor and electronic circuits in fully depleted SOI technology for high-temperature applications

Denis Flandre, Vincent Dessard, Laurent Demeus, 2001, IEEE Trans. Ind. Electron..

Low-noise SOI Hall devices

Denis Flandre, Christian Renaux, Vincent Mosser, 2003, SPIE International Symposium on Fluctuations and Noise.

SOI-CMOS technology for Thin Film Sensors on Membranes

Denis Flandre, Jean-Pierre Raskin, Benoit Olbrechts, 2005 .

Robustness-aware sleep transistor engineering for power-gated nanometer subthreshold circuits

David Bol, Cédric Hocquet, Denis Flandre, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

A physically-based C/sub /spl infin//-continuous fully-depleted SOI MOSFET model for analog applications

Denis Flandre, B. Gentinne, Benjamin Iniguez, 1996 .

The ATHIS project: Advanced Techniques for High-Temperature System-on-Chip

Denis Flandre, Jean-Didier Legat, X. Jorda, 2005 .

Wireless Sensor Network For Breathing Activity Monitoring

Denis Flandre, Sylvain Druart, Jean-Pierre Raskin, 2008 .

IF MEMS filters for mobile communication

Denis Flandre, E. Quevy, Andreas Kaiser, 2001, ETFA 2001. 8th International Conference on Emerging Technologies and Factory Automation. Proceedings (Cat. No.01TH8597).

Systematic HDL design of a Sigma - Delta fractional-N phase-locked loop for wireless applications

Denis Flandre, A. El Oualkadi, 2008 .

Modeling of the bulk versus SOI CMOS performances for the optimal design of APS circuits in low-power low-voltage applications

Denis Flandre, Aryan Afzalian, 2003 .

Impact of Radiations on CMOS-MEMS Sensors and a Mitigation Technique

Denis Flandre, Laurent Francis, Florin Udrea, 2016 .

Single event effects and total ionising dose in 600V Si-on-SiC LDMOS transistors for rad-hard space applications

Denis Flandre, V. Pathirana, C. W. Chan, 2017, 2017 47th European Solid-State Device Research Conference (ESSDERC).

SOI technology for single-chip harsh environment microsystems

Denis Flandre, Jean-Pierre Raskin, François Iker, 2004 .

Towards Securing Low-Power Digital Circuits with Ultra-Low-Voltage Vdd Randomizers

David Bol, Denis Flandre, François-Xavier Standaert, 2016, SPACE.

C ∞ -continuous high-temperature model for low-doped accumulation mode silicon-on-insulator pMOSFETs

Denis Flandre, Youri Houk, Alexei Nazarov, 2006 .

DNA analytical CMOS-compatible capacitive systems

Denis Flandre, Jean-Pierre Raskin, Luis Moreno Hagelsieb, 2005 .

The graded-channel SOI MOSFET to alleviate the parasitic bipolar effects and improve the output characteristics

Denis Flandre, Joao Antonio Martino, Vincent Dessard, 1999 .

Design of SOI CMOS operational amplifiers for applications up to 300/spl deg/C

Denis Flandre, J. P. Eggermont, B. Gentinne, 1996 .

Development of New Micro- and Nano- Bio- and Environmental SOI-Sensors in UCL

Denis Flandre, Jean-Pierre Raskin, Luis Moreno Hagelsieb, 2007 .

3D-Integrated Multi-Sensor Demonstrator System for Environmental Monitoring

David Bol, Denis Flandre, Guido Dolmans, 2019, 2019 20th International Conference on Solid-State Sensors, Actuators and Microsystems & Eurosensors XXXIII (TRANSDUCERS & EUROSENSORS XXXIII).

Back-gate Bias Influence on the Operation of Lateral SOI PIN Photodiodes at High Temperatures

Denis Flandre, Renato Giacomini, Aryan Afzalian, 2013 .

Artificial microbeams to sense air flow and temperature combining MEMS and CMOS technologies

Denis Flandre, Jean-Pierre Raskin, Nicolas André, 2008 .

An extended CAD methodology for sizing low-power low-voltage OTA architectures in decananometric technologies

Denis Flandre, D. Flandre, Geoffroy Gosset, 2010, 2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD).

Fully-depleted SOI-CMOS technology for heterogeneous micropower and high-temperature microsystems

Denis Flandre, 2000 .

Fully-Automated and Portable Design Methodology for Optimal Sizing of Energy-Efficient CMOS Voltage Rectifiers

Denis Flandre, Geoffroy Gosset, D. Flandre, 2011, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

Ultra-thin body and BOX SOI Analog Figures of Merit

O. Faynot, Denis Flandre, F. Andrieu, 2011 .

Interests and Limitations of Technology Scaling for Subthreshold Logic

David Bol, Denis Flandre, Jean-Didier Legat, 2009, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

C infinite - continuous AM SOI pMOSFET Model for High-Temperature Applications

Denis Flandre, Youri Houk, Alexei Nazarov, 2005 .

Review on double-gate MOSFETs and FinFETs modeling

Denis Flandre, B. Iniguez, J. C. Tinoco, 2013 .

High-temperature SOI MOS device processing

Denis Flandre, 1996 .

Multi-gate MOSFET behavior at high temperatures

Denis Flandre, Valeriya Kilchytska, Malgorzata Jurczak, 2007 .

Clock Jitter effect on switched-capacitor filter design

Denis Flandre, Ahmed El Oualkadi, Jean-Marie Paillot, 2006 .

Understanding the limitations and improving the relevance of SPICE simulations in side-channel security evaluations

Denis Flandre, François-Xavier Standaert, Dina Kamel, 2014, Journal of Cryptographic Engineering.

CAMEL: An Ultra-Low-Power VGA CMOS Imager based on a Time-Based DPS Array

David Bol, Denis Flandre, Cecilia Gimeno, 2016, ICDSC.

A new memory effect (MSD) in fully depleted SOI MOSFETs

Denis Flandre, Sorin Cristoloveanu, Maryline Bawedin, 2005 .

Submicrometer graded-channel SOI MOSFET modeling for low temperature analog circuit design

Denis Flandre, Marcelo Antonio Pavanello, Michelly de Souza, 2006 .

Out-of-plane MEMS-based mechanical airflow sensor co-integrated in SOI CMOS technology

Denis Flandre, Laurent Francis, Jean-Pierre Raskin, 2014 .

A review of leakage current in SOI CMOS ICs: impact on parametric testing techniques

Denis Flandre, Jean-Pierre Raskin, Benjamin Iniguez, 2003 .

SO1 TECHNOLOGY FOR HIGH-TEMPERATURE APPLICATIONS

Denis Flandre, B. Gentinne, P. Francis, 1992 .

Méthodologie de conception d'un photorécepteur intégré et son application en technologie CMOS-SOI

Denis Flandre, Aryan Afzalian, 2003 .

New leakage drain current model for high-temperature SOI MOSFET

Denis Flandre, Joao Antonio Martino, Marcelo Bellodi, 1995 .

Specific features of MuGFETs behavior at high temperatures in a wide frequency range

Denis Flandre, Jean-Pierre Raskin, Valeriya Kilchytska, 2011 .

Nanometer MOSFET effects on the minimum-energy point of 45nm subthreshold logic

David Bol, Denis Flandre, Jean-Didier Legat, 2009, ISLPED.

Impact of mobility variation on threshold voltage extraction by transconductance change and gm/Id methods and its demonstration on advanced SOI MOSFETs

Denis Flandre, Jean-Pierre Raskin, Valeriya Kilchytska, 2011 .

A battery-less BLE smart sensor for room occupancy tracking supplied by 2.45-GHz wireless power transfer

David Bol, Denis Flandre, Pengcheng Xu, 2019, Integr..

Investigation of Low-Power Low-Voltage Circuit Techniques for a Hybrid Full-Adder Cell

Denis Flandre, Jean-Didier Legat, Ilham Hassoune, 2004, PATMOS.

A Sizing Methodology for On-Chip Switched-Capacitor DC/DC Converters

David Bol, Julien De Vos, Denis Flandre, 2014, IEEE Transactions on Circuits and Systems I: Regular Papers.

Impact of temperature reduction and channel engineering on the linearity of FD SOI nMOSFETs

Denis Flandre, Marcelo Antonio Pavanello, Cor Claeys, 2009 .

Variability and ripple analysis of an on-chip all-digital AVS system

David Bol, Julien De Vos, Denis Flandre, 2011 .

Efficient passive energy harvesters at 950 MHz and 2.45 GHz for 100 μW applications in 65 nm CMOS

Denis Flandre, Jean-Pierre Raskin, Pierre-Antoine Haddad, 2016, 2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS).

FD MOS SOI circuit to enhance the ratio of illuminated to dark current of a co-integrated a-Si: H photodiode

Denis Flandre, Antonio Cerdeira, Magali Estrada, 2003, Microelectron. Reliab..

Compact model for highly-doped double-gate SOI MOSFETs targeting baseband analog applications

Denis Flandre, Antonio Cerdeira, Jean-Pierre Raskin, 2007 .

Improvement of SOI MOS current-mirror performances using serial-parallel association of transistors

Denis Flandre, Sorin Cristoloveanu, Jean-Pierre Colinge, 1996 .

A circuit level 65nm node bulkand SOI technologies comparison for analog amplifiers

Denis Flandre, Guillaume Pollissard, 2011 .

Analytical Modeling of Double Gate Graded-Channel SOI Transistors for Analog Applications

Denis Flandre, Marcelo Antonio Pavanello, Antonio L. Cerdeira, 2009 .

A straightforward ΣΔ fractional-N phase-locked loop HDL design for RF applications

Denis Flandre, Ahmed El Oualkadi, 2008 .

Comparison of Asymmetric Self-Cascode and Graded-Channel Structures for High Performance Analog SOI MOSFETs

Denis Flandre, Marcelo Antonio Pavanello, Michelly de Souza, 2012 .

Hybrid full-adder cell in 0.13 µm PD SOI CMOS for low-voltage low-power applications

Denis Flandre, Jean-Didier Legat, Ilham Hassoune, 2005 .

A Formal Study of Power Variability Issues and Side-Channel Attacks for Nanoscale Devices

Denis Flandre, François-Xavier Standaert, Nicolas Veyrat-Charvillon, 2011, EUROCRYPT.

Compact model for single event transients and total dose effects at high temperatures for partially depleted SOI MOSFETs

Denis Flandre, El Hafed Boufouss, Joaquín Alvarado, 2010, Microelectron. Reliab..

Ultra-Low Power High Temperature and Radiation Hard Complementary Metal-Oxide-Semiconductor (CMOS) Silicon-on-Insulator (SOI) Voltage Reference

Denis Flandre, Pierre Gérard, El Hafed Boufouss, 2013, Sensors.

New method for determination of harmonic distortion in SOI FD transistors

Denis Flandre, Adelmo Ortiz-Conde, F. J. Garcia Sanchez, 2002 .

Analysis and optimization for dynamic read stability in 28nm SRAM bitcells

Yehea I. Ismail, David Bol, Denis Flandre, 2015, 2015 IEEE International Symposium on Circuits and Systems (ISCAS).

Communication and Networking Strategies for Autonomous Actuators and Sensors

Denis Flandre, Claude Richard, Mickaël Lallart, 2009 .

Design of operational transconductance amplifiers with improved gain by using graded-channel SOI nMOSFETs

Denis Flandre, Marcelo Antonio Pavanello, João Antonio Martino, 2003, 16th Symposium on Integrated Circuits and Systems Design, 2003. SBCCI 2003. Proceedings..

An ISFET-like innovative device applied to labeled DNA detection

Denis Flandre, Jean-François Remacle, Jean-Pierre Raskin, 2006 .

A new fully-depleted SOI MOSFET macro-model valid from DC to RF

Denis Flandre, Jean-Pierre Raskin, Danielle Vanhoenacker-Janvier, 2001 .

Introduction to Part 3

Denis Flandre, 2013 .

Routes towards Novel Active Pressure Sensors in SOI Technology

Denis Flandre, Jean-Pierre Raskin, Thomas Pardoen, 2010 .

Ultra-low-power circuits

David Bol, Denis Flandre, Jean-Didier Legat, 2010 .

Innovative SOI circuit design for extreme applications

Denis Flandre, Vincent Dessard, Pierre Delatte, 2000 .

Networking Strategies for Structural Health Monitoring with Autonomous Sensors

Denis Flandre, Pierre Gérard, Tahar Kezai, 2009 .

Experimental and simulation analysis of electrical characteristics of common-source current mirrors implemented with asymmetric self-cascode silicon-on-insulator n-channel metal-oxide-semiconductor field-effect transistors

Denis Flandre, Marcelo Antonio Pavanello, Michelly de Souza, 2016, IET Circuits Devices Syst..

Harsh Environment Sensing Platforms in Silicon-on-Insulator technology

Denis Flandre, Laurent Francis, Numa Couniot, 2014 .

Integration of aluminum oxide based sensors for medical and health monitoring applications

Denis Flandre, Laurent Francis, Jean-Pierre Raskin, 2009 .

High temperature SOI CMOS low power circuits for MEMS co-integrated interfaces

Denis Flandre, Jean-Pierre Raskin, Benoit Olbrechts, 2009 .

Building ultra-low-power high-temperature digital circuits in standard high-performance SOI technology

David Bol, Julien De Vos, Denis Flandre, 2008 .

Ultra Low Power CMOS Circuits Working in Subthreshold Regime for High Temperature and Radiation Environments

Denis Flandre, Laurent Francis, El Hafed Boufouss, 2011 .

Modelling of the leakage drain current in accumulation-mode SOI pMOSFETs for high-temperature applications

Denis Flandre, Benjamin Iniguez, Joao Antonio Martino, 2001 .

An 80-MHz 0.4V ULV SRAM macro in 28nm FDSOI achieving 28-fJ/bit access energy with a ULP bitcell and on-chip adaptive back bias generation

David Bol, Denis Flandre, Ludovic Moreau, 2017, ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference.

Towards a New Generation of Ultra-Thin P-Type Silicon Strip Detectors for Hadrontherapy Beam Monitoring

Denis Flandre, Jean-Pierre Raskin, Benoit Olbrechts, 2011 .

SOI technology for high-temperature electronics

Denis Flandre, 1993 .

Silicon pixel detector for proton therapy dosimetry

Denis Flandre, Mohamed Bouterfa, 2010 .

Design techniques for reliable timing closure in ULV SoCs

David Bol, Julien De Vos, Cédric Hocquet, 2011 .

Disruptive ultra-low-leakage design techniques for ultra-low-power mixed-signal microsystems

David Bol, Denis Flandre, Geoffroy Gosset, 2011, 2011 Faible Tension Faible Consommation (FTFC).

0.15µm Fully Depleted SOI for Mixed-Signal Applications up to 250°C: Are We Approaching the Limits of Device Scaling for High-Temperature Electronics ?

Denis Flandre, Valeriya Kilchytska, Pierre Delatte, 2003 .

Power Optimization in Operational Amplifier Design

Denis Flandre, Fernando Silveira, 2004 .

Gate leakage currents model for FinFETs implemented in Verilog‐A for electronic circuits design

Denis Flandre, Antonio Cerdeira, Valeriya Kilchytska, 2014 .

Analysis of floating substrate effects on the intrinsic gate capacitance of SOI MOSFETSs using two-dimensional device simulation

Denis Flandre, 1993 .

A magnetic-based approach for improving the specificity and sensibility of electronics biosensors in diagnostic field

Denis Flandre, Numa Couniot, Nancy Van Overstraeten-Schlögel, 2012 .

Novel ultra low-power design techniques for analog, digital and memory functions - Implementations in SOI technology

Denis Flandre, 2008 .

Fully-Depleted SOI CMOS Technology for Heterogeneous Micropower, High-Temperature or RF Microsystems

Denis Flandre, Jean-Pierre Raskin, Stéphane Adriaensen, 2001 .

Self-Heating in 28 FDSOI UTBB MOSFETs at Cryogenic Temperatures

Denis Flandre, Michel Haond, Jean-Pierre Raskin, 2019, ESSDERC 2019 - 49th European Solid-State Device Research Conference (ESSDERC).

Some mitigations for unequal data variance in linear regression

Denis Flandre, Laurent Francis, Jean-Pierre Raskin, 2011 .

Functional Nanomaterials and Devices VII

Denis Flandre, V. S. Lysenko, Alexei Nazarov, 2014 .

A talk about university – industry R&D collaborations in the contexts of Walloon competitiveness clustersand European projects on topics such as microsystems for aerospace or biomedical applications

Denis Flandre, D. Flandre, 2014 .

A security oriented transient-noise simulation methodology: Evaluation of intrinsic physical noise of cryptographic designs

Denis Flandre, François-Xavier Standaert, Itamar Levi, 2019, Integr..

Harvesting the potential of nano-CMOS for lightweight cryptography: an ultra-low-voltage 65 nm AES coprocessor for passive RFID tags

David Bol, Cédric Hocquet, Denis Flandre, 2011, Journal of Cryptographic Engineering.

Electrical characterization of an industrial SOS-CMOS process up to 300°C

Denis Flandre, Valeriya Kilchytska, David Levacq, 2002 .

Ultra low power SOI transducer for flow and dew-based humidity sensing

Denis Flandre, Sylvain Druart, Laurent Francis, 2011 .

Characterization and Modeling of Single Event transients in LDMOS-SOI technology

Denis Flandre, Valeriya Kilchytska, José Joaquin Alvarado Pulido, 2009, ESSDERC 2009.

Design of thin-film fully-depleted SOI CMOS analog circuits significantly outperforming bulk implementations

Denis Flandre, J. P. Eggermont, B. Gentinne, 1994, Proceedings. IEEE International SOI Conference.

Assessment of advanced SOI technologies for high-temperature applications

Denis Flandre, Valeriya Kilchytska, José Joaquin Alvarado Pulido, 2009 .

Impact of Technology Scaling on Digital Subthreshold Circuits

David Bol, Denis Flandre, Jean-Didier Legat, 2008, 2008 IEEE Computer Society Annual Symposium on VLSI.

Effect of parasitic elements on UTBB FD SOI MOSFETs RF figures of merit

Denis Flandre, Jean-Pierre Raskin, Valeriya Kilchytska, 2014 .

Design methodology for sizing DCDC converters supplying subthreshold circuits

David Bol, Julien De Vos, Denis Flandre, 2011 .

CONNAN: A computer-aided design tool based on sharing information for analog circuit sizing

Denis Flandre, David Marin, J. Oliver, 1997 .

Insulated substrate impedance transducers: an innovative semiconductor device applied to labelled DNA sensing

Denis Flandre, Jean-François Remacle, Jean-Pierre Raskin, 2006 .

Cross-Sensitivities of Ring Oscillators on Thin Dielectric Membrane for Pressure Sensing Applications

Denis Flandre, Jean-Pierre Raskin, Benoit Olbrechts, 2008 .

Technology scaling for ultra-low-power circuits – Is mainstream technology adapted to special design?

David Bol, Denis Flandre, 2008 .

A 1-GHz operational transconductance amplifier in SOI technology

Denis Flandre, J. P. Eggermont, Jean-Pierre Colinge, 1995, 1995 IEEE International SOI Conference Proceedings.

A Battery-Less BLE IoT Motion Detector Supplied by 2.45-GHz Wireless Power Transfer

David Bol, Denis Flandre, Pengcheng Xu, 2018, 2018 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS).

Low-voltage low-power potential of SOI (Silicon on Insulator)

Denis Flandre, Jean-Pierre Colinge, Paul Jespers, 1997 .

Characterization of Carrier Generation in Thin-Film SOI Devices by Reverse Gated-Diode Technique and Its Application at High Temperatures

Denis Flandre, Tamara Rudenko, Valeriya Kilchytska, 2005 .

Ultra-Low Power circuit design

David Bol, Denis Flandre, 2008 .

Multiple-Wavelength Detection in SOI Lateral PIN Diodes With Backside Reflectors

Denis Flandre, Florin Udrea, Guoli Li, 2017, IEEE Transactions on Industrial Electronics.

Characterization of thin-film SOI split-drain MOS transistors as magnetic sensors

Denis Flandre, Gonzales Picun, 2001 .

A 65nm 1V to 0.5V linear regulator with ultra low quiescent current for mixed-signal ULV SoCs

David Bol, Denis Flandre, Guerric de Streel, 2014, 2014 IEEE Faible Tension Faible Consommation.

Design of a Branch-Based Carry-Select Adder IP Portable in 0.25 µm Bulk and Silicon-On-Insulator CMOS Technologies

Denis Flandre, Amaury Nève, 2001, VLSI-SOC.

Low-swing current mode logic (LSCML): A new logic style for secure and robust smart cards against power analysis attacks

Denis Flandre, Jean-Didier Legat, Ilham Hassoune, 2006, Microelectron. J..

Towards ultra-low-voltage wideband noise-cancelling LNAs in 28nm FDSOI

David Bol, Denis Flandre, Catherine Dehollain, 2015, 2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

Comparison of self-heating and its effect on analogue performance in 28 nm bulk and FDSOI

Denis Flandre, Jean-Pierre Raskin, Sergej Makovejev, 2016 .

Experimental Study of the OCTO SOI nMOSFET and Its Application in Analog Integrated Circuits

Denis Flandre, Christian Renaux, Leonardo Navarenho de Souza Fino, 2012 .

Fully CMOS-compatible low-power microheater

Denis Flandre, Jean-Pierre Raskin, A. Akheyar, 2002, Symposium on Design, Test, Integration, and Packaging of MEMS/MOEMS.

A 2.24-pJ/bit 2.5-Gb/s UWB receiver in 28-nm FDSOI CMOS for low-energy chip-to-chip communications

David Bol, Denis Flandre, Cecilia Gimeno, 2020 .

Conception de circuits analogiques micro-puissance en technologie CMOS-SOI

Denis Flandre, Stéphane Adriaensen, David Levacq, 2003 .

OCTO Layout Variations as an Alternative to Mitigate TID Effects

Denis Flandre, Christian Renaux, Salvador Pinillos Gimenez, 2015 .

Analysis of the thin-film SOI lateral bipolar transistor and optimization of its output characteristics for high-temperature applications

Denis Flandre, Stéphane Adriaensen, 2002 .

From BULK to SOI : A designer point of view

Denis Flandre, Vincent Dessard, Pierre Delatte, 2001 .

A 25MHz 7μW/MHz ultra-low-voltage microcontroller SoC in 65nm LP/GP CMOS for low-carbon wireless sensor nodes

David Bol, Julien De Vos, Cédric Hocquet, 2012, 2012 IEEE International Solid-State Circuits Conference.

Special section of papers from the Radecs 2000 workshop

Denis Flandre, Wojtek Hajdas, C. Claeys, 2001 .

Scaling laws and performance improvements of integrated biosensor microarrays with multi-pixel per spot

Denis Flandre, Numa Couniot, Aryan Afzalian, 2012 .

CMOS analog ASICs full custom for nuclear physics applications

Denis Flandre, A. Viviani, Margherita Russo, 1996 .

MEMS for mobile communication

Denis Flandre, E. Quevy, Dominique Collard, 2001 .

Pushing Adaptive Voltage Scaling Fully on Chip

David Bol, Julien De Vos, Denis Flandre, 2012, J. Low Power Electron..

Laterally asymmetric channel engineering in fully depleted double gate SOI MOSFETs for high performance analog applications

Abhinav Kranti, Denis Flandre, Jean-Pierre Raskin, 2004 .

A 1.5 V SOI-CMOS transconductor for high frequencies

Denis Flandre, Santiago Celma, J. Sabadell, 2000 .

A physically-based continuous model for graded-channel SOI MOSFET

Denis Flandre, Marcelo Antonio Pavanello, Benjamin Iniguez, 2002 .

Diodes model for the leakage drain current in enhancement-mode SOI nMOSFETs at 300°C

Denis Flandre, Benjamin Iniguez, Joao Antonio Martino, 2000 .

Characterization of ultra-thin silicon strip detectors for hadrontherapy beam monitoring

Denis Flandre, Eduardo Cortina Gil, Mohamed Bouterfa, 2013, 2013 IEEE International Instrumentation and Measurement Technology Conference (I2MTC).

A Robust 10-Gb/s Duobinary Transceiver in 0.13-μm SOI CMOS for Short-Haul Optical Networks

David Bol, Denis Flandre, Santiago Celma, 2018, IEEE Transactions on Industrial Electronics.

Unified deep-submicron fully-depleted SOI MOSFET modeling for circuit simulation

Denis Flandre, Benjamin Iniguez, C. Raynaud, 1999 .

Perspectives of UTBB FD SOI MOSFETs for analog and RF applications

Denis Flandre, Jean-Pierre Raskin, Sergej Makovejev, 2014 .

Automated layout-integrated sizing of a 2.45 GHz differential-drive rectifier in 28 nm FDSOI CMOS

David Bol, Denis Flandre, Jean-Pierre Raskin, 2017, 2017 IEEE Wireless Power Transfer Conference (WPTC).

High-Temperature Analog/Digital SOI processes and components

Denis Flandre, 2001 .

Comparison of hot-carrier effects in thin-film accumulation-mode SOI and GAA p-MOSFETs

Denis Flandre, Sorin Cristoloveanu, Jean-Pierre Colinge, 1993 .

A Hybrid Full-adder Cell for High-Performance and Low-Power Design

Denis Flandre, Jean-Didier Legat, Ilham Hassoune, 2004 .

Potential and modeling of 1-/spl mu/m SOI CMOS operational transconductance amplifiers for applications up to 1 GHz

Denis Flandre, Jean-Pierre Raskin, J.-P. Colinge, 1998 .

SOI Lateral PIN Diodes for Temperature and UV Sensing in Very Harsh Environments

Denis Flandre, Michelly de Souza, Pavanello, 2009 .

Design of a Low Voltage-Low Power, Highly linear Fully-Depleted SOI Operational Transconductance Amplifier for Hearing Aid Application

Denis Flandre, Octavian Buiu, Bertrand Rue, 2006 .

3-D capacitive MEMS sensors co-integrated with SOI CMOS circuits

Denis Flandre, Jean-Pierre Raskin, Nicolas André, 2008 .

Feasibility of smart cards in silicon-on-insulator (SOI) technology

Denis Flandre, Jean-Jacques Quisquater, Amaury Nève, 1999 .

PLL Jitter Behavioral Modeling and Simulation using HDL-A.

Denis Flandre, Jean-Didier Legat, Pierre Delatte, 1999 .

Direct Measurement of DNA Concentration within a closed tube container by UV light transmission and lateral p-i-n photodiode read-out in SOI technology

Denis Flandre, Pascal Dupuis, Olivier Bulteel, 2008 .

Nanotechnologies pour circuits intégrés et capteurs intelligents

Denis Flandre, 2003 .

Portable wireless microsensing system for human breath monitoring

Denis Flandre, Sylvain Druart, Laurent Francis, 2010 .

Device level support for emerging CMOS technologies

Denis Flandre, Jose Joaquin Alvarado, 2009 .

Analog circuit design using graded-channel silicon-on-insulator nMOSFETs

Denis Flandre, Joao Antonio Martino, Marcelo Antonio Pavanello, 2002 .

Low-power half-rate dual-loop clock-recovery system in 28-nm FDSOI

David Bol, Denis Flandre, Cecilia Gimeno, 2018, 2018 IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS).

Ultra-Low-Voltage Nanometer CMOS Circuits for Smart Energy- Autonomous Systems

David Bol, Julien De Vos, Cédric Hocquet, 2010 .

A Self-Oscillating System to Characterize Liquid Salinities within a Single triangular Waveform Signal

Denis Flandre, Sylvain Druart, Laurent Francis, 2014 .

Harmonic distortion analysis using an improved charge sheet model for PD SOI MOSFETs

Denis Flandre, Antonio Cerdeira, Joaquín Alvarado, 2007, Microelectron. J..

Metodología de optimización para LNA de cancelación de ruido y distorsión

Denis Flandre, Cecilia Gimeno, Santiago Celma, 2019 .

Bulk and surface micromachined SOI MEMS: from sensors to testing micromachines

Denis Flandre, Jean-Pierre Raskin, Thomas Pardoen, 2006 .

Extended theoretical analysis of the steady-state linear behaviour of accumulation-mode, long-channel p-MOSFETs on SOI substrates

Denis Flandre, A. Terao, 1992 .

Validation of a Novel ultra-thin silicon Strip Detector for Hadron Therapy beam Monitoring

Denis Flandre, Mohamed Bouterfa, D. Flandre, 2013, J. Circuits Syst. Comput..

Problems in designing thin-film accumulation-mode p-channel SOI MOSFETs for CMOS digital circuit environment

Denis Flandre, 1991 .

CMOS SOI&Bulk: Cell Level Comparison

Denis Flandre, J. Carrabina, J. Riera, 1995 .

Information Theoretic and Security Analysis of a 65-Nanometer DDSLL AES S-Box

Denis Flandre, François-Xavier Standaert, Dina Kamel, 2011, CHES.

Characterization and modelling of single event transients in LDMOS-SOI FETs

Denis Flandre, El Hafed Boufouss, Joaquín Alvarado, 2011, Microelectron. Reliab..

Improvement of sub 0.25 µm fully-depleted SOI CMOS analog performance by thinning the Si film

Denis Flandre, Benjamin Iniguez, Vincent Dessard, 2001 .

Cryogenic operation of graded-channel silicon-on-insulator nMOSFETs for high performance analog applications

Denis Flandre, Marcelo Antonio Pavanello, João Antonio Martino, 2006, Microelectron. J..

Implementation of the symmetric doped double-gate MOSFET model in Verilog-A for circuit simulation

Denis Flandre, Antonio Cerdeira, Benjamin Iniguez, 2010 .

Dynamic body potential variation in FD SOI MOSFETs operated in deep non-equilibrium regime: Model and applications

Denis Flandre, S. Cristoloveanu, Florin Udrea, 2010 .

Comparison of analog performance in conventional and graded-channel fully-depleted SOI MOSFETs

Denis Flandre, Marcelo Antonio Pavanello, Joao Antonio Martino, 2000 .

Design and characterisation of ultra-low-power SOI-CMOS IC temperature level detector

Denis Flandre, Laurent Francis, El Hafed Boufouss, 2012 .

A continuous time biquad in SOI technology

Denis Flandre, Santiago Celma, Pedro A. Martinez, 1997 .

Performance of double-gate SOI NMOSFETs at low temperature

Denis Flandre, Sorin Cristoloveanu, Jean-Pierre Colinge, 2001 .

Let’s make it Noisy: A Simulation Methodology for adding Intrinsic Physical Noise to Cryptographic Designs

Denis Flandre, François-Xavier Standaert, Kashif Nawaz, 2018, 2018 14th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME).

Kink-like effect in long n-channel twin-gate fully-depleted SOI MOSFETs

Denis Flandre, Denis Deceuster, 1994 .

Low-Noise High-Temperature SOI Analog Circuits

Denis Flandre, Stéphane Adriaensen, Vincent Dessard, 2000 .

Ultra-Low-Power logic style for low-frequency high-temperature applications

David Bol, Denis Flandre, Jean-Didier Legat, 2008 .

Simulation of noise due to random configurations of biomolecules on capacitive biosensors

Denis Flandre, Laurent Francis, Numa Couniot, 2011 .

Automated design of a 13.56 MHz corner-robust efficient differential drive rectifier for 10 μA load

Denis Flandre, Jean-Pierre Raskin, Pierre-Antoine Haddad, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

0.25 μm fully depleted SOI MOSFETs for RF mixed analog-digital circuits, including a comparison with partially depleted devices with relation to high frequency noise parameters

O. Faynot, Denis Flandre, L. Picheta, 2002 .

Fabrication method of semiconductor devices

Denis Flandre, Jean-Pierre Raskin, Amaury Nève, 2002 .

Using OCTO SOI nMOSFET to Reduce Die Area of Analog Integrated Circuits

Denis Flandre, Christian Renaux, Salvador Pinillos Gimenez, 2012 .

SOI n-MOSFET low-frequency noise from full to partial depletion: measurements, modeling and implications for analog designs

Denis Flandre, Stéphane Adriaensen, Vincent Dessard, 2001 .

Advanced CMOS SOI Technologies & designs for high operational temperature micro-systems

Denis Flandre, 2014 .

HDL System-Level Design of O-QPSK Receiver for 2.4-GHz Band IEEE 802.15.4

Denis Flandre, Ahmed El Oualkadi, D. Flandre, 2007 .

Variable Barrier Resonant Tunneling Transistor: A New Path Towards Steep Slope and High On-Current?

Denis Flandre, Jean-Pierre Colinge, Aryan Afzalian, 2010 .

An ultra-low-power frequency-tunable UWB pulse generator using 65nm CMOS technology

Luc Vandendorpe, Denis Flandre, Mohamad Al Kadi Jazairli, 2010, 2010 IEEE International Conference on Ultra-Wideband.

A Self-Tuning Inductive Powering System for Biomedical Implants

Denis Flandre, Robert Puers, Geoffroy Gosset, 2011 .

A wireless low power readout circuit for capacitive breathing sensor

Denis Flandre, Laurent Francis, Geoffroy Gosset, 2010 .

Design and application of SOI CMOS OTAs for high-temperature applications

Denis Flandre, J. P. Eggermont, A. Viviani, 1998 .

A 0.48mm2 5μW-10mW indoor/outdoor PV energy-harvesting management unit in a 65nm SoC based on a single bidirectional multi-gain/multi-mode switched-cap converter with supercap storage

David Bol, Julien De Vos, Denis Flandre, 2015, ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC).

New Memory Effect for Fully Depleted SOI MOSFETs

Denis Flandre, Sorin Cristoloveanu, Maryline Bawedin, 2005 .

CMOS SOI magnetic field sensors for applications up to 300°C

Denis Flandre, Jean-Pierre Colinge, Jean-Pierre Eggermont, 1996 .

Formation of TiN/CoSi2 barrier layer on thin-film SOI for high-temperature applications

Denis Flandre, Jean-Pierre Colinge, R. Rai, 1997 .

Etude d’un oscillateur en anneau micropuissance à 433MHz intégré en technologie CMOS/SOS

Denis Flandre, David Levacq, Laurent Vancaillie, 2002 .

A Capacitance-to-Frequency Converter With On-Chip Passivated Microelectrodes for Bacteria Detection in Saline Buffers Up to 575 MHz

David Bol, Denis Flandre, Numa Couniot, 2015, IEEE Transactions on Circuits and Systems II: Express Briefs.

Modeling of the AM SOI pMOSFETs

Denis Flandre, Benjamin Iniguez, Youri Houk, 2006 .

Dynamic differential self-timed logic families for robust and low-power security ICs

Denis Flandre, Jean-Didier Legat, Ilham Hassoune, 2007, Integr..

Efficient Multiple-Valued Signed-Digit Full Adder Based on NDR MOS Structures and its Application to an N-bit Current-Mode Constant-Time Adder

David Bol, Denis Flandre, Jean-Didier Legat, 2007, J. Multiple Valued Log. Soft Comput..

SOI CMOS Devices and Circuits for High Temperature Electronics

Denis Flandre, 2008 .

Testbed for IR-UWB based ranging and positioning: Experimental performance and comparison to CRLBs

Luc Vandendorpe, Claude Oestges, Denis Flandre, 2010, IEEE 5th International Symposium on Wireless Pervasive Computing 2010.

ased Methodology for the Design of CMOS Analog Circuits and Its Application to the Synthesis of a Silicon-on-Insulator

Denis Flandre, Fernando Silveira, Paul Jespers, 1996 .

Compact Model of Double-Gate MOSFETs for Low Power Analog Applications

Denis Flandre, Antonio Cerdeira, Jean-Pierre Raskin, 2006 .

SOI co-integrated microsensors

Denis Flandre, Jean-Pierre Raskin, Benoit Olbrechts, 2007 .

Investigation of Floating Body Effects on SOI MOSFET Gate Tunneling Currents

Denis Flandre, Maryline Bawedin, Magali Estrada, 2003 .

A 16×16 CMOS Capacitive Biosensor Array Towards Detection of Single Bacterial Cell

Denis Flandre, Numa Couniot, Laurent A. Francis, 2016, IEEE Trans. Biomed. Circuits Syst..

Modelling Supported Design of Light Management Structures in Ultra-Thin Cigs Photovoltaic Devices

Denis Flandre, Marika Edoff, Marko Topič, 2019, Informacije MIDEM - Journal of Microelectronics, Electronic Components and Materials.

Implementation of High Performance Operational Transconductance Amplifiers Using Graded-Channel SOI NMOSFETs

Denis Flandre, Marcelo Antonio Pavanello, Salvador Pinillos Gimenez, 2005 .

Potential of SOI for analog and mixed analog-digital low-power applications

Denis Flandre, J. P. Eggermont, Jean-Pierre Colinge, 1995, Proceedings ISSCC '95 - International Solid-State Circuits Conference.

High-temperature low-frequency noise measurements in thin-film SOI n-MOSFETs

Denis Flandre, Vincent Dessard, 1997 .

A very high efficiency ultra-low-power 13.56MHz voltage rectifier in 150nm SOI CMOS

Denis Flandre, Geoffroy Gosset, 2009, 2009 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT).

TRAPPIST/sub e/ pixel sensor with 2 mu m SOI technology

Denis Flandre, Eduardo Cortina Gil, Christian Renaux, 2009 .

Aluminium Oxide Based Sensors Integration for Medical and Health Monitoring Applications

Denis Flandre, Laurent Francis, Jean-Pierre Raskin, 2009 .

Digital Performance of OCTO Layout Style on SOI MOSFET at High Temperature Environment

Denis Flandre, Christian Renaux, Salvador Pinillos Gimenez, 2019 .

Analog design oriented ultra-deep-submicron CMOS technology analysis

Denis Flandre, Geoffroy Gosset, Guillaume Pollissard-Quatremere, 2010, 6th Conference on Ph.D. Research in Microelectronics & Electronics.

An ultra-low-power UWB IR pulse receiver using 65nm CMOS technology

Denis Flandre, Mohamad Al Kadi Jazairli, 2013, 2013 IEEE Faible Tension Faible Consommation.

Harsh-environment behaviours and performances of advanced Silicon-on-Insulator CMOS sensors, transistors and circuits

Denis Flandre, Laurent Francis, Jean-Pierre Raskin, 2011 .

Low-power/high-temperature sensors and MEMS in SOI technology

Denis Flandre, Laurent Francis, Jean-Pierre Raskin, 2010 .

Multilevel Half-Rate Phase Detector for Clock and Data Recovery Circuits

David Bol, Denis Flandre, Cecilia Gimeno, 2018, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Smart Energy Management and Conversion

Denis Flandre, Marco Tartagni, Aldo Romani, 2014 .

A novel approach for active pressure sensors in thin film SOI technology

Denis Flandre, Jean-Pierre Raskin, Thomas Pardoen, 2011 .

Monolithically integrated 10 Gbit/s photodiode and transimpedance amplifier in thin-film SOI CMOS technology

Denis Flandre, Aryan Afzalian, 2006 .

Radiation Hard Pixel Sensor with SOI technology

Denis Flandre, Christian Renaux, Lawrence Soung Yee, 2009 .

SOI MOSFETs capacitive pressure transducers for high-temperature applications

Denis Flandre, J. P. Eggermont, Vincent Dessard, 1997 .

New Universal Figure of Merit for Embedded Si Piezoresistive Pressure Sensors

Denis Flandre, Laurent Francis, Thibault Delhaye, 2021, IEEE Sensors Journal.

Aluminium Oxide Based Sensors for Medical Applications

Denis Flandre, Laurent Francis, Jean-Pierre Raskin, 2009 .

Threshold voltage extraction techniques and temperature effect in context of global variability in UTBB mosfets

Denis Flandre, Jean-Pierre Raskin, François Andrieu, 2013, 2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC).

Modeling of Thin-Film Lateral SOI PIN Diodes with an Alternative Multi-Branch Explicit Current Model

Denis Flandre, Juan Muci, Marcelo Antonio Pavanello, 2012 .

Testing SOI CMOS ICs with Parametric Methods: a Fundamental Analysis

Denis Flandre, Jean-Pierre Raskin, Benjamin Iniguez, 2001 .

SINANO: SILICON-BASED NANODEVICES EUROPEAN NETWORK OF EXCELLENCE OF THE 6th FRAMEWORK PROGRAMME

Denis Flandre, Enrico Sangiorgi, F. Balestra, 2004 .

Feasibility of the Smart Card in Silicon-On-Insulator (SOI) Technology

Denis Flandre, Jean-Jacques Quisquater, Amaury Nève, 1999, Smartcard.

Industrial Implementation of Pacemaker Integrated Circuit in Bulk CMOS Technology

Denis Flandre, Fernando Silveira, 2004 .

FinFETs perspectives for high-temperature applications

Denis Flandre, Valeriya Kilchytska, 2007 .

Ultra-low power flip-flops for MTCMOS circuits

Denis Flandre, David Levacq, Vincent Dessard, 2005, 2005 IEEE International Symposium on Circuits and Systems.

A review of fully-depleted SOI CMOS technology for microsystems

Denis Flandre, Stéphane Adriaensen, Vincent Dessard, 2000 .

DNA Analytical CMOS Systems-on-a-Chip

Denis Flandre, Jean-Pierre Raskin, Boris Foultier, 2006 .

Comparison of equivalent precision dedicated FFT processors

Denis Flandre, Paul Jespers, Andre Vandemeulebroecke, 1988, 1988., IEEE International Symposium on Circuits and Systems.

Investigation of Monostable-Bistable Transition Logic Element Circuits based on Ultra-Low-Power Diodes

David Bol, Denis Flandre, Jean-Didier Legat, 2006 .

Bulk vs SOI CMOS APS optimal design for low power low voltage applications

Denis Flandre, Jean-Didier Legat, Aryan Afzalian, 2001 .

Circuits et capteurs intelligents intégrés en technologie CMOS SOI pour environnements et applications hétérogènes

Denis Flandre, Jean-Pierre Raskin, 2003 .

A gm/ID based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA

Denis Flandre, Fernando Silveira, Paul Jespers, 1996, IEEE J. Solid State Circuits.

Small-signal Modelling of SOI-specific MOSFET Behaviours

Denis Flandre, 2007 .

Investigation of Al/Al2O3 interdigitated structures on Si biochips towards the electrical detection of TP53 DNA single point mutations

Denis Flandre, Luis Moreno Hagelsieb, Rémi Pampin, 2006 .

Design of Multi Gb/s Monolithically Integrated Photodiodes and Multi-stage Transimpedance Amflifiers in Thin-Film SOI CMOS Technology

Denis Flandre, Aryan Afzalian, 2012 .

Nanometer MOSFET Effects on the Minimum-Energy Point of Sub-45nm Subthreshold Logic---Mitigation at Technology and Circuit Levels

David Bol, Denis Flandre, Jean-Didier Legat, 2010, TODE.

Measurement and simulation of floating substrate effects on the intrinsic gate capacitance characteristics of SOI n-MOSFETs

Denis Flandre, 1992 .

3-D CMOS compatible MEMS sensors and actuators

Denis Flandre, Jean-Pierre Raskin, Nicolas André, 2008 .

High-temperature electronics applications of SOI CMOS technology

Denis Flandre, 1997 .

Operational amplifier power optimization for a given total (slewing plus linear) settling time

Denis Flandre, Fernando Silveira, 2002, Proceedings. 15th Symposium on Integrated Circuits and Systems Design.

The detrimental impact of negative Celsius temperature on ultra-low-voltage CMOS logic

David Bol, Denis Flandre, Jean-Didier Legat, 2010, 2010 Proceedings of ESSCIRC.

Ultra-Low Power High-Temperature Voltage Reference Using Standard SOI CMOS Process

Denis Flandre, Stéphane Adriaensen, Vincent Dessard, 2001 .

Ultra-low-power and high-temperature CMOS design techniques for analog, digital and memory functions. Implementations in SOI technology

Denis Flandre, 2007 .

A Methodology for the Simulation of MEMS Spiral Inductances used as Magnetic Sensors

Denis Flandre, Sylvain Druart, Laurent Francis, 2010 .

Disruptive design techniques based on ultra-low-leakage CMOS blocks for ultra-low-power circuits and microsystems

David Bol, Denis Flandre, Geoffroy Gosset, 2012 .

Ultra-high-efficiency co-integrated photovoltaic energy scavenger

Denis Flandre, Geoffroy Gosset, Olivier Bulteel, 2011, IEEE 2011 International SOI Conference.

Analysis and Potential of the Bipolar- and Hybrid-Mode Thin-Film SOI MOSFETs for High-Temperature Applications

Denis Flandre, Stéphane Adriaensen, Vincent Dessard, 2001 .

CMOS on SOI operational amplifiers for application up to 300°C

Denis Flandre, J. P. Eggermont, Jean-Pierre Colinge, 1994 .

Methodology for Performance Optimization in Noise- and Distortion-Canceling LNA

Denis Flandre, Carlos Sánchez-Azqueta, Cecilia Gimeno, 2019, 2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD).

Design automation of CMOS OTAs using symbolic analysis and gm/ID methodology

Denis Flandre, Fernando Silveira, A. Viviani, 1996 .

Potential and modelling of 1 [micro sign]m 1 GHz SOI CMOS OTAs

Denis Flandre, Jean-Pierre Colinge, Jean-Pierre Raskin, 1997 .

Performance of Common-Source, Cascode and Wilson Current Mirrors Implemented with Graded Channel SOI nMOSFETs in a Wide Temperature Range

Denis Flandre, Marcelo Antonio Pavanello, Michelly de Souza, 2009 .

Automated Design of a 13.56 MHz $19\;\upmu\;\text{W}$ Passive Rectifier With 72% Efficiency Under $10\;\upmu\;\text{A}$ load

Denis Flandre, Jean-Pierre Raskin, Pierre-Antoine Haddad, 2016 .

SOI for analog, digital and RF SOCs and microsystems applications

Denis Flandre, 2008 .

Gradient importance sampling: An efficient statistical extraction methodology of high-sigma SRAM dynamic characteristics

David Bol, Denis Flandre, Johan Segers, 2018, 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Design Benefits of Self-Cascode Configuration for Analog Applications in 28nm FDSOI technology

Denis Flandre, Valeriya Kilchytska, Michelly de Souza, 2018 .

A low-power and low-noise biopotential preamplifier in SOI CMOS technology

Denis Flandre, Bertrand Rue, 2008 .

Systematic HDL Design of a S-? Fractional-N Phase-Locked Loop for Wireless Applications

Denis Flandre, Ahmed El Oualkadi, 2008, 2008 IEEE Computer Society Annual Symposium on VLSI.

SOI-specific MOSFET modeling issues

Denis Flandre, D. Flandre, 2007 .

A method to extend the validity of quasi-static SOI MOSFET models

Denis Flandre, Paul Jespers, L. F. Ferreira, 1997 .

Introduction to part 3, in Nanoscale CMOS

Denis Flandre, F. Balestra, 2013 .

Low Temperature and Channel Engineering Influence on the Behavior of Analog Source-Follower Buffers

Denis Flandre, Marcelo Antonio Pavanello, Michelly de Souza, 2008 .

Electrical characterization of FinFETs: Special aspects

Denis Flandre, Tamara Rudenko, Valeriya Kilchytska, 2006 .

High-energy neutrons effect on strained and non-strained SOI MuGFETs and planar MOSFETs

Denis Flandre, Cor Claeys, Eddy Simoen, 2012, Microelectron. Reliab..

DNA electrical detection experiments with alumina passivated CMOS sensors

Denis Flandre, 2008 .

On the great potential of non-doped MOSFETs for analog applications in partially-depleted SOI CMOS process

Denis Flandre, Valeriya Kilchytska, David Levacq, 2005 .

FinFET analogue characterization from DC to 110 GHz

Denis Flandre, Nadine Collaert, Jean-Pierre Raskin, 2005 .

Aplicaciòn de la metodologìa gm/Id: Diseno de un detector de portadora para RF en tecnologìa SOI

Denis Flandre, David Marin, J. Oliver, 1996 .

Interpretation of Quasi-static C-v Characteristics of Mosos Capacitors On Soi Substrates

Denis Flandre, Pierre J. Verlinden, F. Van de Wiele, 1991 .

Experimental Study of the Effective Mobility in Doped- and Undoped-Channel Triple-Gate FinFET Structures

Denis Flandre, Tamara Rudenko, Valeriya Kilchytska, 2007 .

Ultra Low Power 3-D Flow Meter in Monolithic SOI Technology

Denis Flandre, Laurent Francis, Jean-Pierre Raskin, 2011 .

Scaling trends of the AES S-box low power consumption in 130 and 65 nm CMOS technology nodes

Denis Flandre, François-Xavier Standaert, Dina Kamel, 2009, 2009 IEEE International Symposium on Circuits and Systems.

Technology flavor selection and adaptive techniques for timing-constrained 45nm subthreshold circuits

David Bol, Denis Flandre, Jean-Didier Legat, 2009, ISLPED.

FinFET: a mature multi-gate MOS technology ? A wideband transistor simulation and characterization approach

Denis Flandre, Jean-Pierre Raskin, Tamara Rudenko, 2005 .

A simple leakage drain current model for accumulation-mode SOI nMOSFETs operating up to 300°C

Denis Flandre, Benjamin Iniguez, Joao Antonio Martino, 2001 .

Self-planarization: a new concept for 3-D and high density integrated circuits

Denis Flandre, Pierre J. Verlinden, A. Terao, 1988 .

A methodology to simulate soft error transients from technology to circuits in bulk and SOI CMOS

Denis Flandre, G. Berger, 2008 .

Circuits for high-temperature electronics

Denis Flandre, 1997 .

Impact of neutron irradiation on the RF properties of oxidized high-resistivity silicon substrates with and without a trap-rich passivation layer

Denis Flandre, Jean-Pierre Raskin, Joaquín Alvarado, 2011, Microelectron. Reliab..

A talk about university - industry relationships, transfers and start-up creation

Denis Flandre, 2014 .

SOI Technology for Future High-Performance Smart Cards

Denis Flandre, Jean-Jacques Quisquater, Amaury Nève, 2003, IEEE Micro.

High-Voltage High-Current DMOS Transistor Compatible with High-Temperature Thin-Film SOI CMOS Applications

Philippe Godignon, Denis Flandre, Luis Moreno Hagelsieb, 2004 .

Experimental Study of the OCTO SOI nMOSFET to Improve the Device Performance

Denis Flandre, Christian Renaux, L. Navarenho de Souza Fino, 2012 .

Special Features of the Back-Gate Effects in UTB SOI MOSFETs

Denis Flandre, O. Faynot, Jean-Pierre Raskin, 2010 .

A Transient Noise Analysis of Secured Dual-Rail Based Logic Style

Denis Flandre, François-Xavier Standaert, Itamar Levi, 2018, 2018 New Generation of CAS (NGCAS).

Harsh-environment Behaviours and Performances of Advanced Silicon-on-Insulator CMOS Transistors

Denis Flandre, Valeriya Kilchytska, José Joaquin Alvarado Pulido, 2012 .

Variability of UTBB MOSFET analog figures of merit in wide frequency range

Denis Flandre, Michel Haond, Jean-Pierre Raskin, 2014, 2014 44th European Solid State Device Research Conference (ESSDERC).

A CMOS High-Q LC Eight-Path Bandpass Filter for Wireless Broadband Applications

Denis Flandre, Jean-Marie Paillot, Ahmed El Oualkadi, 2007, 2007 14th IEEE International Conference on Electronics, Circuits and Systems.

Characterization of FD-SOI MOSFETs based on EKV model

Andrzej Kociubiński, Denis Flandre, Krzysztof Kucharski, 2005 .

Integrated capacitive biosensors based on filamentous phages

Denis Flandre, Joris Proost, Patrice Soumillion, 2010 .

Impact of radiations on the electromechanical properties of materials and on the piezoresistive and capacitive transduction mechanisms used in microsystems

Denis Flandre, Sylvain Druart, Laurent Francis, 2013, Photonics West - Micro and Nano Fabricated Electromechanical and Optical Components.

UCL SOI Sensors Advantages for Consumer and Health Monitoring Applications

Denis Flandre, Sylvain Druart, Jean-Pierre Raskin, 2008 .

Recent developments in high-temperature operation of SOI devices and circuits

Denis Flandre, 1992 .

Design of a 2.45-GHz RF Energy Harvester for SWIPT IoT smart sensors

David Bol, Denis Flandre, Pengcheng Xu, 2018, 2018 IEEE Asian Solid-State Circuits Conference (A-SSCC).

A comparative study of non-linearities in bulk and SOI linear resistors based on 2- and 4-transistor structures

Denis Flandre, Jean-Pierre Colinge, B. Gentinne, 1995, 1995 IEEE International SOI Conference Proceedings.

Analog performance and application of graded-channel fully depleted SOI MOSFETs

Denis Flandre, Marcelo Antonio Pavanello, Joao Antonio Martino, 2000 .

Improved current mirror output performance by using graded-channel SOI nMOSFETs

Denis Flandre, Marcelo Antonio Pavanello, Joao A. Martino, 2001 .

PMOSFET-based Pressure Sensors in FD SOI

Denis Flandre, Jean-Pierre Raskin, Benoit Olbrechts, 2014 .

Design of a branch-based 64-bit carry-select adder in 0.18 μm partially depleted SOI CMOS

Denis Flandre, Helmut Schettler, Thomas Ludwig, 2002, ISLPED '02.

High Temperature Characterization of Carrier Generation in SOI MOS Devices Using Gated-Diode Technique

Denis Flandre, Tamara Rudenko, Valeriya Kilchytska, 2001 .

SOI technology for high-temperature MOS devices and circuits

Denis Flandre, 1994 .

Study of the deep-submicron SOI MOSFET leakage current behavior at high temperatures

Denis Flandre, Benjamin Iniguez, Joao Antonio Martino, 2000 .

ULP basic blocks and their uses

Denis Flandre, Stéphane Adriaensen, David Levacq, 2005 .

A modified gm/ID design methodology for deeply scaled CMOS technologies

Denis Flandre, Geoffroy Gosset, Guillaume Pollissard-Quatremère, 2014 .

A Self-Gating RF Energy Harvester for Wireless Power Transfer With High-PAPR Incident Waveform

David Bol, Denis Flandre, Pengcheng Xu, 2021, IEEE Journal of Solid-State Circuits.

A Wearable Low-Power Sensing Platform for Environmental and Health Monitoring: The Convergence Project

Denis Flandre, Adrian M. Ionescu, Tan-Phu Vuong, 2021, Sensors.

Compact modeling of the high temperature effect on the single event transient current generated by heavy ions in SOI 6T-SRAM

Denis Flandre, José Joaquin Alvarado Pulido, El Hafed Boufouss, 2010 .

Deep-submicron DC to RF SOI MOSFET characterization and modelling

Denis Flandre, Pascal Simon, C. Raynaud, 1999 .

Meta-stable DIP (MSD) Effect in SOI FinFETs

Denis Flandre, Sorin Cristoloveanu, Maryline Bawedin, 2006 .

An analytical 3D model for short-channel effects in undoped FinFETs

Denis Flandre, Yehea Ismail, Valeria Kilchytska, 2015 .

Assessment of Global Variability in UTBB MOSFETs in Subthreshold Regime

Denis Flandre, F. Andrieu, Jean-Pierre Raskin, 2014 .

Electrical characterization of true Silicon-On-Nothing MOSFETs fabricated by Si layer transfer over a pre-etched cavity

Denis Flandre, Jean-Pierre Raskin, Benoit Olbrechts, 2007 .

A physically-based C/sub /spl infin//-continuous model for accumulation-mode SOI pMOSFETs

Denis Flandre, B. Gentinne, Vincent Dessard, 1999 .

A Compact Model for Single Event Effects in PD SOI Sub-Micron MOSFETs

Denis Flandre, Valeriya Kilchytska, Joaquín Alvarado, 2011, IEEE Transactions on Nuclear Science.

Trigate nanowire MOSFETs analog figures of merit

Denis Flandre, Jean-Pierre Raskin, Sergej Makovejev, 2015 .

A bandgap circuit operating up to 300/spl deg/C using lateral bipolar transistors in thin-film CMOS-SOI technology

Denis Flandre, Stéphane Adriaensen, Vincent Dessard, 1999, 1999 IEEE International SOI Conference. Proceedings (Cat. No.99CH36345).

Comparison of floating-body effects in conventional and graded-channel fully-depleted silicon-on-insulator nMOSFETs

Denis Flandre, Marcelo Antonio Pavanello, Joao Antonio Martino, 2000, Proceedings of the 2000 Third IEEE International Caracas Conference on Devices, Circuits and Systems (Cat. No.00TH8474).

Operation of Lateral SOI PIN Photodiodes with Back-Gate Bias and Intrinsic Length Variation

Denis Flandre, Aryan Afzalian, Renato Giacomini, 2013 .

Reduction of gate-to-channel tunneling current in FinFET structures

Denis Flandre, Nadine Collaert, Malgorzata Jurczak, 2007 .

Total ionizing dose effects on the digital performance of irradiated OCTO and conventional fully depleted SOI MOSFET

Denis Flandre, Christian Renaux, Salvador Pinillos Gimenez, 2013, 2013 14th European Conference on Radiation and Its Effects on Components and Systems (RADECS).

Low Power Analog CMOS for Cardiac Pacemakers

Denis Flandre, Fernando Silveira, 2004 .

Characterization of high-efficiency multi-crystalline silicon in industrial production

Denis Flandre, Laurent Francis, Jean-Pierre Raskin, 2013 .

Integral function method for determination of nonlinear harmonic distortion

Denis Flandre, Antonio Cerdeira, Magali Estrada, 2004 .

Moderate Inversion Model of Ultrathin Double-gate Nmos/soi Transistors

Denis Flandre, P. Francis, F. Van de Wiele, 1995 .

Denis Flandre, Jean-Pierre Raskin, Nadine Collaert, 2007 .

Investigation of Deep Submicron Single and Double Gate SOI MOSFETs in Accumulation Mode for Enhanced Performance

Denis Flandre, Benjamin Iniguez, D. Flandre, 2001 .

Graded-channel fully depleted Silicon-On-Insulator nMOSFET for reducing the parasitic bipolar effects

Denis Flandre, Marcelo Antonio Pavanello, Joao Antonio Martino, 2000 .

Deep-submicrometer DC-to-RF SOI MOSFET macro-model

Denis Flandre, Jean-Pierre Raskin, Pascal Simon, 2001 .

RF SOI CMOS technology on 1st and 2nd generation trap-rich high resistivity SOI wafers

Denis Flandre, Jean-Pierre Raskin, B. Kazemi Esfeh, 2016 .

Improving the X-ray radiation tolerance of the analog ICs by using OCTO layout style

Denis Flandre, Christian Renaux, Marcilei Aparecida Guazzelli da Silveira, 2013, 28th Symposium on Microelectronics Technology and Devices (SBMicro 2013).

Influence of device engineering on the analog and RF performances of SOI MOSFETs

Denis Flandre, Jean-Pierre Raskin, Stéphane Adriaensen, 2003 .

Functional Nanomaterials and Devices for Electronics, Sensors and Energy Harvesting

Denis Flandre, Valeriya Kilchytska, Alexei Nazarov, 2014 .

Operation of suspended lateral SOI PIN photodiode with aluminum back gate

Denis Flandre, Florin Udrea, Syed Zeeshan Ali, 2016, 2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS).

The Effects of Neutron Irradiation on Analog Performance of Fully Depleted SOI MOSFETs

Denis Flandre, Otilia Militaru, Valeriya Kilchytska, 2009 .

Experimental comparative study between the diamond MOSFET and its conventional counterpart in high temperatures environment

Denis Flandre, Christian Renaux, Salvador P. Gimenez, 2013, 2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

Design and performance of a new flash EEPROM on SOI(SIMOX) substrates

Denis Flandre, Jean-Pierre Colinge, Dimitris E. Ioannou, 1994, Proceedings. IEEE International SOI Conference.

Fully integrated blue/UV SOI CMOS photosensor for biomedical and environmental applications

Denis Flandre, Aryan Afzalian, Olivier Bulteel, 2010 .

Total-dose effects in double-gate-controlled NPN bipolar transistors

Denis Flandre, Jean-Pierre Colinge, A. Vandooren, 2001 .

Silicon-on-Insulator Photodiode on Micro-Hotplate Platform With Improved Responsivity and High-Temperature Application

Denis Flandre, Florin Udrea, Syed Zeeshan Ali, 2016, IEEE Sensors Journal.

LOW-NOISE SILICON-ON-INSULATOR HALL DEVICES

Denis Flandre, Stéphane Adriaensen, Christian Renaux, 2004 .

28-nm FDSOI nMOSFET RF Figures of Merits and Parasitic Elements Extraction at Cryogenic Temperature Down to 77 K

Denis Flandre, N. Planes, M. Haond, 2019, IEEE Journal of the Electron Devices Society.

The low-frequency noise behaviour of graded-channel SOI nMOSFETs

Denis Flandre, Marcelo Antonio Pavanello, Eddy Simoen, 2007 .

Bulk and surface micromachined MEMS in thin film SOI technology

Denis Flandre, Jean-Pierre Raskin, Thomas Pardoen, 2007 .

The Integral Function Method: A New Method to Determine the Non-linear Harmonic Distortion

Denis Flandre, Antonio Cerdeira, Jean-Pierre Raskin, 2003 .

A 16 $\times$ 16 CMOS Capacitive Biosensor Array Towards Detection of Single Bacterial Cell

Denis Flandre, Numa Couniot, Laurent A. Francis, 2016, IEEE Transactions on Biomedical Circuits and Systems.

A very high frequency capacitance-controlled oscillator for improved biosensing in high-salt solutions

David Bol, Denis Flandre, Laurent Francis, 2014 .

Floating-Body SOI Memory: Concepts, Physics and Challenges

Denis Flandre, Sorin Cristoloveanu, Florin Udrea, 2009 .

Illuminated to dark ratio improvement in lateral SOI PIN photodiodes at high temperatures

Denis Flandre, Aryan Afzalian, Renato Giacomini, 2014 .

Resonant dielectrophoresis and electrohydrodynamics for high-sensitivity impedance detection of whole-cell bacteria.

Denis Flandre, Numa Couniot, Laurent A Francis, 2015, Lab on a chip.

Direct protein detection with a nano-interdigitated array gate MOSFET.

Denis Flandre, Jean-Pierre Colinge, Jean-Pierre Raskin, 2009, Biosensors & bioelectronics.

Temperature and Silicon Film Thickness Influence on the Operation of Lateral SOI PIN Photodiodes for Detection of Short Wavelengths

Denis Flandre, Marcelo Antonio Pavanello, Michelly de Souza, 2011 .

Analysis of quasi double gate method for performance prediction of deep submicron double gate SOI MOSFETs

Abhinav Kranti, Denis Flandre, Jean-Pierre Raskin, 2005 .

A low-power and in situ annealing mitigation technique for fast neutrons irradiation of integrated temperature sensing diodes

Denis Flandre, Florin Udrea, Syed Zeeshan Ali, 2015, 2015 4th International Conference on Advancements in Nuclear Instrumentation Measurement Methods and their Applications (ANIMMA).

A method to extract mobility degradation and total series resistance of fully-depleted SOI MOSFETs

Denis Flandre, Juin J. Liou, Adelmo Ortiz-Conde, 2002 .

Wireless microsensors system for monitoring breathing activity

Denis Flandre, Sylvain Druart, Laurent Francis, 2009 .

A new interdigitated array microelectrode-oxide-silicon sensor with label-free, high sensitivity and specificity for fast bacteria detection

Denis Flandre, Laurent Francis, Jean-Pierre Raskin, 2011 .

Immobilization of DNA on CMOS compatible materials

Denis Flandre, Luis Moreno Hagelsieb, Rémi Pampin, 2003 .

A Voltage Reference Compatible with Standard SO1 CMOS Processes and Consuming 1pA to 50nA from room temperature up to 3OOOC

Denis Flandre, Stéphane Adriaensen, Vincent Dessard, 2002 .

Mobility characterization in FinFETs using split C-V technique

Denis Flandre, Rita Rooyackers, Jean-Pierre Raskin, 2005 .

An asymmetric channel SOI nMOSFET for reducing parasitic effects and improving output characteristics

Denis Flandre, Marcelo Antonio Pavanello, Joao Antonio Martino, 1999 .

Signal-to-noise ratio optimization for detecting bacteria with interdigitated microelectrodes

Denis Flandre, Laurent Francis, Numa Couniot, 2013 .

Substrate effect on the output conductance frequency response of SOI MOSFETs (inited paper)

Denis Flandre, Jean-Pierre Raskin, Dimitri Lederer, 2007 .

A Silicon-on-Insulator Platform Functionalized By Atomic Layer Deposition for Humidity Sensing

Denis Flandre, Laurent Francis, Florin Udrea, 2014 .

Highly reflective rear surface passivation design for ultra-thin Cu(In,Ga)Se2 solar cells

Denis Flandre, Marika Edoff, Rickard Gunnarsson, 2015 .

Compact diamond MOSFET model accounting for PAMDLE applicable down 150 nm node

Denis Flandre, Christian Renaux, Salvador Pinillos Gimenez, 2014 .

Substrate Effects in sub-32 nm ultra thin SOI MOSFETs with thin buried oxide

O. Faynot, Denis Flandre, F. Andrieu, 2009 .

Comparison of self-heating effect in GAA and SOI mosfets

Denis Flandre, P. Francis, J.-P. Colinge, 1997 .

Silicon-on-insulator technology for high temperature metal oxide semiconductor devices and circuits

Denis Flandre, 1995 .

Characterization of FD SOI devices and VCO's on thin dielectric membranes under pressure

Denis Flandre, Jean-Pierre Raskin, Benoit Olbrechts, 2007 .

Low-Wavelengths SOI CMOS Photosensors for Biomedial Applications

Denis Flandre, Benoît Macq, Aryan Afzalian, 2011 .

Radiation-hard design for SOI MOS inverters

Denis Flandre, Jean-Pierre Colinge, P. Francis, 1994 .

Characterization of quantum efficiency, effective lifetime and mobility in thin film ungated SOI lateral PIN photodiodes

Denis Flandre, Aryan Afzalian, D. Flandre, 2007 .

A low-voltage, low-power microwave SOI MOSFET

Denis Flandre, Jean-Pierre Colinge, Jean-Pierre Raskin, 1996, 1996 IEEE International SOI Conference Proceedings.

28-nm FD-SOI CMOS RF Figures of Merit Down to 4.2 K

Denis Flandre, Jean-Pierre Raskin, Valeriya Kilchytska, 2020, IEEE Journal of the Electron Devices Society.

Effective mobility in FinFET structures with HfO2 and SiON gate dielectrics and TaN gate electrode

Denis Flandre, Tamara Rudenko, Nadine Collaert, 2005 .

Implementation of FD SOI CMOS Technology in ITE

Denis Flandre, Krzysztof Kucharski, Piotr Grabiec, 2011 .

Investigation of salicide processes for thin-film SOI microwave applications

Denis Flandre, Jean-Pierre Colinge, Jean-Pierre Raskin, 1997 .

Sensitive DNA electrical detection based on interdigitated Al/Al2O3 microelectrodes

Denis Flandre, Luis Moreno Hagelsieb, Rémi Pampin, 2004 .

Improved modeling of gate leakage currents for fin-shaped field-effect transistors

Denis Flandre, Antonio Cerdeira, Valeriya Kilchytska, 2013 .

UTBB SOI MOSFETs analog figures of merit: Effects of ground plane and asymmetric double-gate regime

Denis Flandre, Jean-Pierre Raskin, Sergej Makovejev, 2013 .

70 GHz Fmax fully-depleted SOI MOSFET's for low power wireless applications

Denis Flandre, Jean-Pierre Raskin, C. Raynaud, 2000 .

A charge-based continuous model for submicron graded-channel nMOSFET for analog circuit simulation

Denis Flandre, Marcelo Antonio Pavanello, Michelly de Souza, 2005 .

High frequency degradation of body-contacted PD SOI MOSFET output conductance

Denis Flandre, Jean-Pierre Raskin, Dimitri Lederer, 2005 .

Low power pulse generator as a capacitive interface for MEMS applications

Denis Flandre, Mohamad Al Kadi Jazairli, 2009, 2009 Ph.D. Research in Microelectronics and Electronics.

Wide frequency band assessment of 28 nm FDSOI technology platform for analogue and RF applications

Denis Flandre, M. Haond, Jean-Pierre Raskin, 2014 .

Investigating the electronic properties of Al2O3/Cu(In,Ga)Se2 interface

Denis Flandre, Marika Edoff, Bart Vermang, 2015 .

DNA detection based on capacitive Al2O3/Al microelectrodes

Denis Flandre, Rémi Pampin, José Remacle, 2004 .

Evidence of different conduction mechanisms in accumulation-mode p-channel SOI MOSFET's at room and liquid-helium temperatures

Denis Flandre, Jean-Pierre Colinge, C. Claeys, 1993 .

Specific features of multiple-gate MOSFET threshold voltage and subthreshold slope behavior at high temperatures

Denis Flandre, Nadine Collaert, Malgorzata Jurczak, 2007 .

Determination of film and surface recombination in thin-film SOI devices using gated-diode technique

Denis Flandre, Sorin Cristoloveanu, Jean-Pierre Colinge, 2004 .

Charge-sheet modelling of MOS I-V fundamental nonlinearities in MOSFET-C continuous-time filters

Denis Flandre, Paul Jespers, 1995 .

Optimization of Blue/UV Sensors Using PIN Photodiodes in Thin-Film SOI Technology

Denis Flandre, Olivier Bulteel, 2009 .

High performance analog operation of double gate transistors with the graded-channel architecture at low temperatures

Denis Flandre, Marcelo Antonio Pavanello, Jean-Pierre Raskin, 2005 .

MOSFETs Scaling Down: Advantages and Disadvantages for High Temperature Applications

Denis Flandre, K. De Meyer, Valeriya Kilchytska, 2004 .

High performance current mirrors using graded-channel SOI NMOSFETS

Denis Flandre, Marcelo Antonio Pavanello, Joao Antonio Martino, 2001 .

Science and Technology of Semiconductor-On-Insulator Structures and Devices Operating in a Harsh Environment

Denis Flandre, Alexei Nazarov, 2005 .

Experimental study of transconductance and mobility behaviors in ultra-thin SOI MOSFETs with standard and thin buried oxides

O. Faynot, Denis Flandre, Jean-Pierre Raskin, 2010 .

Parasitic bipolar effects in graded-channel fully-depleted Silicon-on-Insulator nMOSFETs

Denis Flandre, Marcelo Antonio Pavanello, Joao Antonio Martino, 2000 .

High-temperature characterization of a PD SOI CMOS process with LDMOS and lateral bipolar structures

Denis Flandre, Stéphane Adriaensen, Vincent Dessard, 1999, HITEN 99. Third European Conference on High Temperature Electronics. (IEEE Cat. No.99EX372).

Substrate impact on threshold voltage and subthreshold slope of sub-32 nm ultra thin SOI MOSFETs with thin buried oxide and undoped channel

O. Faynot, Denis Flandre, Jean-Pierre Raskin, 2010 .

Radiation Effect on Electrical Properties of Fully-Depleted Unibond SOI MOSFETs

Denis Flandre, Stéphane Adriaensen, Youri Houk, 2004 .

Thin films stress extraction using micromachined structures and wafer curvature measurements

Denis Flandre, Jean-Pierre Raskin, Thomas Pardoen, 2004 .

Performance of /spl gamma/-irradiated gate-all-around SOI MOS OTA amplifiers

Denis Flandre, Jean-Pierre Colinge, A. Vandooren, 1997, 1997 IEEE International SOI Conference Proceedings.

Comparison of TiSi2 , CoSi2, and NiSi for Thin‐Film Silicon‐on‐Insulator Applications

Denis Flandre, Jean-Pierre Colinge, Jean-Pierre Raskin, 1997 .

Fully depleted SOI-CMOS technology for high temperature IC applications

Denis Flandre, Jean-Pierre Colinge, B. Gentinne, 1997 .