M. Glesner

发表

Finite-precision analysis of an OFDM burst synchronization scheme

L. D. Kabulepa, M. Glesner, T. Kella, 2001, GLOBECOM'01. IEEE Global Telecommunications Conference (Cat. No.01CH37270).

Comparator-Based Switched-Capacitor Delta-Sigma Modulation

Manfred Glesner, M. Glesner, Bogomir Horvat, 2008 .

Architecture level design space exploration and mapping of hardware

M. Glesner, S. Pandey, M. Muhlhauser, 2005, International Symposium on Signals, Circuits and Systems, 2005. ISSCS 2005..

Influence of circuit nonidealities on switched-capacitor resonators

M. Glesner, M. Momeni, A. Guntoro, 2008, 2008 International Conference on Signals and Electronic Systems.

Accurate energy exploration in low-power MAC architectures

M. Glesner, L.D. Kabulepa, A. Garcia-Ortiz, 2003, Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on.

Limits for switching power consumption in encoded interconnects

M. Glesner, T. Murgan, 2005, International Symposium on Signals, Circuits and Systems, 2005. ISSCS 2005..

A Compact Sequential Classifier for Digital Implementations

M. Glesner, R. Dogaru, I. Dogaru, 2005, EUROCON 2005 - The International Conference on "Computer as a Tool".

Configurable VLSI architecture of a 3-input floating-point adder

M. Glesner, A. Guntoro, 2008, 2008 International Conference on Signals and Electronic Systems.

VLSI System Design for automotive Control

M. Glesner, A. Laudenbach, M. Glesner, 1991, ESSCIRC '91: Proceedings - Seventeenth European Solid-State Circuits Conference.

High-performance floating-point VLSI architecture of a lifting-based wavelet processor

M. Glesner, M. Momeni, A. Guntoro, 2008, 2008 International Conference on Signals and Electronic Systems.

A novel method for the design of radial-basis-function-networks and its implication for knowledge extraction

M. Glesner, A. Konig, R.J. Raschhofer, 1994, Proceedings of 1994 IEEE International Conference on Neural Networks (ICNN'94).

Design and evaluation of a floating-point division operator based on CORDIC algorithm

M. Glesner, S. Pongyupinpanich, F. A. Samman, 2012, 2012 9th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology.

VLSI chip set for floating point vector processing

M. Glesner, A. Laudenbach, P. Windirsch, 1991, Euro ASIC '91.

Comparative Analysis of Multitask Scheduling Algorithms for Reconfigurable Computing Regarding Context Switches and Configuration Cache Usage

M. Glesner, C. Spies, L.S. Indrusiak, 2007, 2007 3rd Southern Conference on Programmable Logic.

A Reconfigurable Prototyping Platform for Smart Sensor Networks

M. Glesner, A. Reinhardt, S. Varyani, 2008, 2008 4th Southern Conference on Programmable Logic.

NoCScope: A graphical interface to improve Networks-on-Chip monitoring and design space exploration

M. Glesner, L. Moller, L.S. Indrusiak, 2009, 2009 4th International Design and Test Workshop (IDT).

New form of the error criterion for the automated dc design of electronic networks

M. Glesner, K. Haubrichs, 1975 .

Associative information processing: algorithms and system

M. Glesner, W. Poechmueller, A. Koenig, 1992, [1992] Proceedings of the International Conference on Application Specific Array Processors.

A High-Level Compact Pattern-Dependent Delay Model for High-Speed Point-to-point Interconnects

M. Glesner, T. Murgan, M. Momeni, 2006, 2006 IEEE/ACM International Conference on Computer Aided Design.

FLOATING-POINT-BASED HARDWARE ACCELATOR OF A BEAM PHASE-MAGNITUDE DETECTOR AND FILTER FOR A BEAM PHASE CONTROL SYSTEM IN A HEAVY-ION SYNCHROTRON APPLICATION ∗

M. Glesner, Faizal Arya Samman, Pongyupinpanich Surapong, 2011 .

A universal CNN neuron for CMOS technology: model and functional capabilities

M. Glesner, R. Dogaru, C. Chitu, 2003, Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on.

Emergent computation in semitotalistic cellular automata: applications in character segmentation

M. Glesner, R. Dogaru, I. Dogaru, 2004, 2004 International Semiconductor Conference. CAS 2004 Proceedings (IEEE Cat. No.04TH8748).

Semi-Totalistic CNN Genes for Compact Image Compression

M. Glesner, R. Tetzlaff, R. Dogaru, 2006, 2006 10th International Workshop on Cellular Neural Networks and Their Applications.

Building blocks for a full custom A/D converter used in a volume flow sensing application

M. Glesner, S. A. Spanoche, 1993 .

Rule weight generation for a fuzzy classification system based on fuzzy clustering methods

M. Glesner, A. Konig, H. Genther, 1994, Proceedings of 1994 IEEE 3rd International Fuzzy Systems Conference.

Programmable and reconfigurable hardware architectures for the rapid prototyping of cellular automata

M. Glesner, R. Dogaru, A. Schumacher, 2005, International Conference on Field Programmable Logic and Applications, 2005..

Graphical interface for debugging RTL Networks-on-Chip

M. Glesner, L. Moller, H. Jesus, 2010, 2010 12th Biennial Baltic Electronics Conference.

Prototyping of a high performance generic Viterbi decoder

M. Glesner, R. Ludewig, A.G. Ortiz, 2002, Proceedings 13th IEEE International Workshop on Rapid System Prototyping.

Advantages of the Linz-Sprott weak nonlinearity on the FPGA implementation of chaotic systems: a comparative analysis

M. Glesner, L.S. Indrusiak, E.C. Dutra e Silva Junior, 2005, International Symposium on Signals, Circuits and Systems, 2005. ISSCS 2005..

Simulated Annealing Algorithms for Optimal Packet Scheduling in Ad Hoc Networks

M. Glesner, P. Zipf, M. Aurelio, 2006, 2006 International Conference on Software in Telecommunications and Computer Networks.

UbiComp device for a decentralized distributed computing environment

M. Glesner, S. Pandey, P. Zipf, 2003, Proceedings of the 3rd IEEE International Symposium on Signal Processing and Information Technology (IEEE Cat. No.03EX795).

A new approach to timing driven partitioning of combinational logic

N. Wehn, M. Glesner, 1991, [1991] Proceedings. First Great Lakes Symposium on VLSI.

A class of single-stage and multi-stage lowpass delta-sigma modulators in 1.2-V 0.13-µm CMOS

M. Glesner, M. Momeni, 2009, 2009 4th International Design and Test Workshop (IDT).

SORT: a fast and compact neural classifier based on a sorting preprocessor

M. Glesner, R. Dogaru, 2004, 2004 2nd International IEEE Conference on 'Intelligent Systems'. Proceedings (IEEE Cat. No.04EX791).

Consistency control in data-driven design automation environments

M. Glesner, R. Reis, T. Murgan, 2005, International Symposium on Signals, Circuits and Systems, 2005. ISSCS 2005..

Adaptive wireless sensor networks powered by hybrid energy harvesting for environmental monitoring

Ping Zhao, M. Glesner, Faizal Arya Samman, 2012, 2012 IEEE 6th International Conference on Information and Automation for Sustainability.

Analysis and performance of a versatile CMOS neural circuit based on multi-nested approach

M. Glesner, R. Dogaru, C. Chiju, 2005, International Symposium on Signals, Circuits and Systems, 2005. ISSCS 2005..

VLSI-SOC: From Systems to Chips: IFIP TC 10/WG 10.5, Twelfth International Conference on Very Large Scale Ingegration of System on Chip (VLSI-SoC 2003), ... Federation for Information Processing)

Leandro Soares Indrusiak, Hans Eveking, Ricardo Reis, 2006 .

A smart wireless sensor for the diagnosis of broken bars in induction motors

M. Glesner, A. Arkkio, J. Martinez, 2012, 2012 13th Biennial Baltic Electronics Conference.

A generic dynamic inspection system for visual object inspection and industrial quality control

M. Glesner, M. Schahn, A. Konig, 1993, Proceedings of 1993 International Conference on Neural Networks (IJCNN-93-Nagoya, Japan).

Extended distance transform approach for robust vehicle detection

Tianlun Liu, M. Glesner, K.F. Ackermann, 2009, 2009 Proceedings of 6th International Symposium on Image and Signal Processing and Analysis.

SCAT - A New Statistical Timing Verifier in a Silicon Compiler System

M. Glesner, J. Schuck, R. B. Steck, 1986, DAC 1986.

Dynamic hardware/software co-design based on a communication-centric hyper-platform

M. Glesner, T. Hollstein, H. Zimmer, 2004, Proceedings. The 16th International Conference on Microelectronics, 2004. ICM 2004..

Layout Generation for Multipliers in VLSI-Digital Signal Processing

M. Glesner, J. Schuck, 1984, ESSCIRC '84: Tenth European Solid-State Circuits Conference.

A constraint length and throughput reconfigurable architecture for Viterbi decoders

M. Glesner, A.G. Ortiz, A.M. Obeid, 2004, 2004 IEEE International Conference on Industrial Technology, 2004. IEEE ICIT '04..

Massively parallel VLSI-implementation of a dedicated neural network for anomaly detection in automated visual quality control

M. Glesner, A. Konig, P. Windirsch, 1994, Proceedings of the Fourth International Conference on Microelectronics for Neural Networks and Fuzzy Systems.

CPCA: a multiplierless neural PCA

M. Glesner, R. Dogaru, I. Dogaru, 2004, 2004 IEEE International Joint Conference on Neural Networks (IEEE Cat. No.04CH37541).

System design challenges in ubiquitous computing environments

M. Glesner, T. Murgan, T. Hollstein, 2004, Proceedings. The 16th International Conference on Microelectronics, 2004. ICM 2004..

Moment-based estimation of switching activity in non-linear architectures

M. Glesner, A. Garcia-Ortiz, 2003, Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on.

An application-tailored dynamically reconfigurable hardware architecture for digital baseband processing

M. Glesner, T. Pionteck, J. Becker, 2000, Proceedings 13th Symposium on Integrated Circuits and Systems Design (Cat. No.PR00843).