Hassen Aziza

发表

Oxide based resistive RAM: ON/OFF resistance analysis versus circuit variability

Santhosh Onkaraiah, Jean Michel Portal, Marc Bocquet, 2014, 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).

Analytical study of complementary memristive synchronous logic gates

Jacques-Olivier Klein, Weisheng Zhao, Erya Deng, 2013, 2013 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH).

Méthodologie de diagnostic et techniques de test pour les mémoires non volatiles de type EEPROM

Hassen Aziza, 2004 .

Threshold voltage asymmetric degradation on octagonal MOSFET during HCI stress

Hassen Aziza, J.-M. Portal, Y. Joly, 2012 .

An Augmented OxRAM Synapse for Spiking Neural Network (SNN) Circuits

Hassen Aziza, H. Bazzi, Jérémy Postel-Pellerin, 2019, 2019 14th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS).

Embedded high-precision frequency-based capacitor measurement system

Jean Michel Portal, Hassen Aziza, Loïc Welter, 2013, 2013 IEEE 19th International On-Line Testing Symposium (IOLTS).

EEPROM memory: threshold voltage built in self diagnosis

Jean Michel Portal, Hassen Aziza, Didier Née, 2003, International Test Conference, 2003. Proceedings. ITC 2003..

Built-in tuning of the local oscillator for open loop modulation of low cost, low power RF transceiver

Wenceslas Rahajandraibe, Fayrouz Haddad, Jean Michel Portal, 2013, 2013 14th Latin American Test Workshop - LATW.

Improvement of a detection chain based on a VCO concept for microelectronic reliability under natural radiative environment

Wenceslas Rahajandraibe, Jean Michel Portal, Hassen Aziza, 2015, 2015 16th Latin-American Test Symposium (LATS).

A High-Speed Structural Method for Testing Address Decoder Faults in Flash Memories

Jean Michel Portal, Hassen Aziza, Olivier Ginez, 2008, 2008 IEEE International Test Conference.

Using short-term fourier transform for particle detection and recognition in a CMOS oscillator-based chain

Wenceslas Rahajandraibe, Hassen Aziza, Remy Vauche, 2018, 2018 IEEE 19th Latin-American Test Symposium (LATS).

Memristor models optimization for large-scale 1T1R memory arrays

Ali Chehab, Mohammad M. Mansour, Hassen Aziza, 2018, 2018 International Conference on IC Design & Technology (ICICDT).

A CMOS OxRAM-Based Neuron Circuit Hardened with Enclosed Layout Transistors for Aerospace Applications

Patrick Girard, Hassen Aziza, Pablo Ilha Vaz, 2020, 2020 IEEE 26th International Symposium on On-Line Testing and Robust System Design (IOLTS).

Power efficiency optimization of charge pumps in embedded low voltage NOR flash memory

Jean Michel Portal, Hassen Aziza, W. SteveNgueya, 2017, 2017 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC).

A lightweight write-assist scheme for reduced RRAM variability and power

Ali Chehab, Mohammad M. Mansour, Hassen Aziza, 2018, Microelectron. Reliab..

Compact modeling solutions for OxRAM memories

Christophe Muller, Hassen Aziza, Marc Bocquet, 2013, 2013 IEEE Faible Tension Faible Consommation.

Investigation of a CMOS oscillator concept for particle detection and diagnosis

Wenceslas Rahajandraibe, Jean Michel Portal, Hassen Aziza, 2012, 2012 13th Latin American Test Workshop (LATW).

An automated methodology to diagnose geometric defect in the EEPROM cell

Jean Michel Portal, Hassen Aziza, Didier Née, 2002, Proceedings. International Test Conference.

Accurate multiplexed test structure for threshold voltage matching evaluation

Jean Michel Portal, Hassen Aziza, Loïc Welter, 2014, 2014 9th IEEE International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS).

Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories

Jacques-Olivier Klein, Weisheng Zhao, Erya Deng, 2014, IEEE Transactions on Circuits and Systems I: Regular Papers.

EEPROM Diagnosis Based on Threshold Voltage Embedded Measurement

Jean Michel Portal, Hassen Aziza, Didier Née, 2005, J. Electron. Test..

Single-ended sense amplifier robustness evaluation for OxRRAM technology

Jean Michel Portal, Marc Bocquet, Hassen Aziza, 2013, 2013 8th IEEE Design and Test Symposium.

High voltage recycling scheme to improve power consumption of regulated charge pumps

Jean Michel Portal, Hassen Aziza, W. SteveNgueya, 2017, 2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS).

Temperature and hump effect impact on output voltage spread of low power bandgap designed in the sub-threshold area

Jean Michel Portal, Hassen Aziza, Y. Joly, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

Low cost built-in-tuning of on-chip passive filters for low-if double quadrature rf receiver

Wenceslas Rahajandraibe, Fayrouz Haddad, Jean Michel Portal, 2015, 2015 16th Latin-American Test Symposium (LATS).

Bipolar OxRRAM memory array reliability evaluation based on fault injection

Jean Michel Portal, Marc Bocquet, Christophe Muller, 2011, 2011 IEEE 6th International Design and Test Workshop (IDT).

Simulation of intrinsic bipolar transistor mechanisms for future capacitor-less eDRAM on bulk substrate

Hassen Aziza, Annie Pérez, Emmanuel Bergeret, 2010, 2010 17th IEEE International Conference on Electronics, Circuits and Systems.

Design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cells

Zhaohao Wang, Jacques-Olivier Klein, Weisheng Zhao, 2014, J. Parallel Distributed Comput..

Design of Hybrid CMOS Non-Volatile SRAM Cells in 130nm RRAM Technology

Hassen Aziza, Mathieu Moreau, Adnan Harb, 2018, 2018 30th International Conference on Microelectronics (ICM).

A novel test structure for OxRRAM process variability evaluation

Jean Michel Portal, Marc Bocquet, Christophe Muller, 2013, Microelectron. Reliab..

Improvement of a VCO concept for low energy particule detection and recognition

Wenceslas Rahajandraibe, Jean Michel Portal, Hassen Aziza, 2014, 2014 15th Latin American Test Workshop - LATW.

Impact of resistive paths on NVM array reliability: Application to Flash & ReRAM memories

Hassen Aziza, Jérémy Postel-Pellerin, Pierre Canet, 2016, Microelectron. Reliab..

True Random Number Generator Integration in a Resistive RAM Memory Array Using Input Current Limitation

Hassen Aziza, Adnan Harb, Pierre Canet, 2020, IEEE Transactions on Nanotechnology.

An Ultra-Low Power and High Speed Single Ended Sense Amplifier for Non-Volatile Memories

Jean Michel Portal, Hassen Aziza, W. SteveNgueya, 2017, 2017 New Generation of CAS (NGCAS).

A novel design methodology for current reference circuits

Hassen Aziza, Annie Pérez, Emmanuel Bergeret, 2008, 2008 15th IEEE International Conference on Electronics, Circuits and Systems.

Multilevel operation in oxide based resistive RAM with SET voltage modulation

Santhosh Onkaraiah, Jean Michel Portal, Marc Bocquet, 2016, 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS).

Improvement of MOSFET matching characterization with calibrated multiplexed test structure

Jean Michel Portal, Hassen Aziza, Loïc Welter, 2015, Microelectron. Reliab..

A Novel Low Power Oriented Design Methodology for Analog Blocks

Jean Michel Portal, Hassen Aziza, Emmanuel Bergeret, 2008, J. Low Power Electron..

Novel RRAM CMOS Non-Volatile Memory Cells in 130nm Technology

Hassen Aziza, Mathieu Moreau, Adnan Harb, 2018, 2018 International Conference on Computer and Applications (ICCA).

RRAM-based non-volatile SRAM cell architectures for ultra-low-power applications

Hassen Aziza, Adnan Harb, Hussein Bazzi, 2020 .

Low-cost auto-calibration of passive polyphase filter in image reject receiver

Wenceslas Rahajandraibe, Fayrouz Haddad, Jean Michel Portal, 2013, 2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS).

Low Power Radio Frequency Transceiver with Built-In-Tuning of the Local Oscillator for Open Loop Modulation

Wenceslas Rahajandraibe, Fayrouz Haddad, Jean Michel Portal, 2014, J. Low Power Electron..

Built-in tuning of RFIC Passive Polyphase Filter by process and thermal monitoring

Wenceslas Rahajandraibe, Fayrouz Haddad, Jean Michel Portal, 2012, 2012 13th Latin American Test Workshop (LATW).

Synchronous full-adder based on complementary resistive switching memory cells

Jacques-Olivier Klein, Weisheng Zhao, Erya Deng, 2013, 2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS).

Design of a Novel Hybrid CMOS Non-Volatile SRAM Memory in 130nm RRAM Technology

Hassen Aziza, Adnan Harb, Hussein Bazzi, 2020, 2020 15th Design & Technology of Integrated Systems in Nanoscale Era (DTIS).

SITARe: A simulation tool for analysis and diagnosis of radiation effects

Jean Michel Portal, Hassen Aziza, Karine Coulié-Castellani, 2012, 2012 13th Latin American Test Workshop (LATW).

Device-Aware Test: A New Test Approach Towards DPPB Level

Erik Jan Marinissen, Said Hamdioui, Mottaqiallah Taouil, 2019, 2019 IEEE International Test Conference (ITC).

An automated design methodology for EEPROM cell (ADE)

Jean Michel Portal, Hassen Aziza, Didier Née, 2002, Proceedings of the 2002 IEEE International Workshop on Memory Technology, Design and Testing (MTDT2002).

CAMEM: A Computationally-Efficient and Accurate Memristive Model With Experimental Verification

Ali Chehab, Mohammad M. Mansour, Hassen Aziza, 2019, IEEE Transactions on Nanotechnology.

Resistive RAM SET and RESET Switching Voltage Evaluation as an Entropy Source for Random Number Generation

Hassen Aziza, Adnan Harb, Mathieu Moreau, 2020, 2020 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).

SPICE level analysis of Single Event Effects in an OxRRAM cell

Wenceslas Rahajandraibe, Jean Michel Portal, Marc Bocquet, 2013, 2013 14th Latin American Test Workshop - LATW.

Impact of hump effect on MOSFET mismatch in the sub-threshold area for low power analog applications

Hassen Aziza, Pascal Fornara, Franck Julien, 2010, 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology.

An Automated Design Methodology for Charge Pump Circuits

Hassen Aziza, Annie Pérez, Emmanuel Bergeret, 2007, 2007 14th IEEE International Conference on Electronics, Circuits and Systems.

Optimization of a Particles Detection Chain Based on a VCO Structure

Wenceslas Rahajandraibe, Jean Michel Portal, Hassen Aziza, 2016, J. Electron. Test..

An on-line testing scheme for repairing purposes in Flash memories

Jean Michel Portal, Hassen Aziza, Olivier Ginez, 2009, 2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems.

Optimization of SEU Simulations for SRAM Cells Reliability under Radiation

Jean Michel Portal, Hassen Aziza, Karine Coulié-Castellani, 2012, J. Electron. Test..

An innovative standard cells remapping method for in-circuit critical parameters monitoring

Jean Michel Portal, Hassen Aziza, Loïc Welter, 2014, 2014 IEEE 20th International On-Line Testing Symposium (IOLTS).

Resistive RAM variability monitoring using a ring oscillator based test chip

Jean Michel Portal, Hassen Aziza, 2016, Microelectron. Reliab..

A Lightweight Reconfigurable RRAM-based PUF for Highly Secure Applications

Ali Chehab, Mohammad M. Mansour, Hassen Aziza, 2020, 2020 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).

An Ultra-Low Power and High Performance Single Ended Sense Amplifier for Low Voltage Flash Memories

Jean Michel Portal, Hassen Aziza, W. SteveNgueya, 2018, J. Low Power Electron..

Back-end soft and hard defect monitoring using a single test chip

Jean Michel Portal, Hassen Aziza, Didier Née, 2011, Microelectron. Reliab..

Nonvolatile memories: Present and future challenges

Elena I. Vatajelu, Hassen Aziza, Cristian Zambelli, 2014, 2014 9th International Design and Test Symposium (IDT).

Oxide-based RRAM models for circuit designers: A comparative analysis

Ali Chehab, Mohammad M. Mansour, Hassen Aziza, 2017, 2017 12th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS).

A Power Efficient Regulated Charge Pump Based on Charge Sharing for Contactless Devices: An Alternative to Four-Phase Charge Pumps

Jean Michel Portal, Hassen Aziza, W. SteveNgueya, 2017, J. Low Power Electron..

An Energy-Efficient Current-Controlled Write and Read Scheme for Resistive RAMs (RRAMs)

Said Hamdioui, Mottaqiallah Taouil, Hassen Aziza, 2020, IEEE Access.

Crossbar architecture based on 2R complementary resistive switching memory cell

Jacques-Olivier Klein, Weisheng Zhao, Yue Zhang, 2012, 2012 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH).

On the investigation of built-in tuning of RF receivers using on-chip polyphase filters

Wenceslas Rahajandraibe, Fayrouz Haddad, Jean Michel Portal, 2013, 2013 IEEE 31st VLSI Test Symposium (VTS).

Tutorial: Silicon Systems for Wireless LAN

Alberto Bosio, Hassen Aziza, Zoran Stamenkovic, 2021, 2021 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

Density Enhancement of RRAMs using a RESET Write Termination for MLC Operation

Said Hamdioui, Mottaqiallah Taouil, Hassen Aziza, 2021, 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Improving TID Radiation Robustness of a CMOS OxRAM-Based Neuron Circuit by Using Enclosed Layout Transistors

Arnaud Virazel, Patrick Girard, Hassen Aziza, 2021, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Performances and Stability Analysis of a Novel 8T1R Non-Volatile SRAM (NVSRAM) versus Variability

Hassen Aziza, Mathieu Moreau, Adnan Harb, 2021, Journal of Electronic Testing.

Design Considerations Towards Zero-Variability Resistive RAMs in HRS State

Wenceslas Rahajandraibe, Hassen Aziza, Karine Coulié, 2021, 2021 IEEE 22nd Latin American Test Symposium (LATS).

Investigation of Single Event Effects in a Resistive RAM memory array by SPICE level simulation

Wenceslas Rahajandraibe, Hassen Aziza, Karine Coulié, 2021, 2021 IEEE 22nd Latin American Test Symposium (LATS).

Circuit-level evaluation of a new zero-cost transistor in an embedded non-volatile memory CMOS technology

Sébastien Haendler, Hassen Aziza, Alexandre Malherbe, 2021, 2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS).

Benchmarking and optimization of trench-based multi-gate transistors in a 40 nm non-volatile memory technology

Hassen Aziza, Arnaud Régnier, Vincenzo Della Marca, 2021, 2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS).

Intermittent Undefined State Fault in RRAMs

Anteneh Gebregiorgis, Said Hamdioui, Mottaqiallah Taouil, 2021, 2021 IEEE European Test Symposium (ETS).

Design and Simulation of a 128 kb Embedded Nonvolatile Memory Based on a Hybrid RRAM (HfO2 )/28 nm FDSOI CMOS Technology

Fabien Clermidy, Bastien Giraud, Olivier Thomas, 2017, IEEE Transactions on Nanotechnology.

Non volatile memory reliability prediction based on oxide defect generation rate during stress and retention tests

Hassen Aziza, Arnaud Regnier, J-Michel Portal, 2011, 2011 International Semiconductor Device Research Symposium (ISDRS).

Ultra Low Power Charge Pump with Multi-Step Charging and Charge Sharing

Hassen Aziza, Jean-Michel Portal, Julien Mellier, 2016, 2016 IEEE 8th International Memory Workshop (IMW).

EEEPROM tunnel oxide lifetime reliability prediction based on fast electrical stress tests

Hassen Aziza, Arnaud Regnier, J. Plantier, 2010 .