Niteen Patkar

Microarchitecture of HaL's CPU

DeForest Tovey, Simon Li, Akira Katsuno, 1995, Digest of Papers. COMPCON'95. Technologies for the Information Superhighway.

Testing of Vega2, a chip multi-processor with spare processors.

Janet Wu, Samy Makar, Niteen Patkar, 2007, 2007 IEEE International Test Conference.

Implementation trade-offs in using a restricted data flow architecture in a high performance RISC microprocessor

A. Krishnamoorthy, DeForest Tovey, Michael Shebanow, 1995, Proceedings 22nd Annual International Symposium on Computer Architecture.

Error detection and handling in a superscalar, speculative out-of-order execution processor system

Nirmal R. Saxena, Chien Chen, David Chang, 1995, Twenty-Fifth International Symposium on Fault-Tolerant Computing. Digest of Papers.

Small Delay Test in Practice

Yoichi Maeda, Phil Nigh, Janet Wu, 2007 .