Y. Hamamura

Integrated yield management system using critical area analysis

Y. Tsunoda, K. Kanamitsu, Y. Iwata, 2005, ISSM 2005, IEEE International Symposium on Semiconductor Manufacturing, 2005..

Failure rate estimation of each process layer using critical area analysis and failing bit results

Y. Kaneko, S. Kamohara, Y. Tsunoda, 2010, 2010 IEEE/SEMI Advanced Semiconductor Manufacturing Conference (ASMC).

An advanced defect-monitoring test structure for electrical measurements and defect localization

K. Tsunokuni, Y. Hamamura, T. Kumazawa, 2003, International Conference on Microelectronic Test Structures, 2003..

An advanced defect-monitoring test structure for electrical screening and defect localization

Y. Hamamura, H. Asakura, A. Sugimoto, 2004, IEEE Transactions on Semiconductor Manufacturing.