En-Yu Yang

EdgeBERT: Optimizing On-Chip Inference for Multi-Task NLP pdf

Alexander M. Rush, Lillian Pentecost, Victor Sanh, 2020, ArXiv.

A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors

Meng-Fan Chang, Tzu-Hsiang Hsu, Ren-Shuo Liu, 2018, 2018 IEEE International Solid - State Circuits Conference - (ISSCC).

Algorithm-Hardware Co-Design of Adaptive Floating-Point Encodings for Resilient Deep Learning Inference

Alexander Rush, Alexander M. Rush, Gu-Yeon Wei, 2020, 2020 57th ACM/IEEE Design Automation Conference (DAC).

A 65nm 4Kb algorithm-dependent computing-in-memory SRAM unit-macro with 2.3ns and 55.8TOPS/W fully parallel product-sum operation for binary DNN edge processors

Meng-Fan Chang, Shimeng Yu, Rui Liu, 2018, 2018 IEEE International Solid - State Circuits Conference - (ISSCC).

AdaptivFloat: A Floating-point based Data Type for Resilient Deep Learning Inference pdf

Alexander Rush, Gu-Yeon Wei, Vijay Janapa Reddi, 2019, ArXiv.

9.8 A 25mm2 SoC for IoT Devices with 18ms Noise-Robust Speech-to-Text Latency via Bayesian Speech Denoising and Attention-Based Sequence-to-Sequence DNN Speech Recognition in 16nm FinFET

Alexander M. Rush, Gu-Yeon Wei, David Brooks, 2021, 2021 IEEE International Solid- State Circuits Conference (ISSCC).