Takahiko Arakawa

Modeling of NBTI Stress Induced Hole-Trapping and Interface-State-Generation Mechanisms under a Wide Range of Bias Conditions

Hans Jürgen Mattausch, Chenyue Ma, Mitiko Miura-Mattausch, 2013, IEICE Trans. Electron..

A low power SRAM using auto-backgate-controlled MT-CMOS

Koji Nii, Hiroshi Makino, Yasushi Hayakawa, 1998, Proceedings. 1998 International Symposium on Low Power Electronics and Design (IEEE Cat. No.98TH8379).