S. Siddhaye

INTEGRATION OF ENVIRONMENTAL FACTORS IN PRE-LAYOUT DESIGN OPTIMIZATION FOR PRINTED CIRCUIT BOARDS

S. Siddhaye, P. Sheng, 1998 .

Evaluating environmental factors for pre-layout board design

S. Siddhaye, P. Sheng, 1998, Proceedings of the 1998 IEEE International Symposium on Electronics and the Environment. ISEE - 1998 (Cat. No.98CH36145).

Environmental effects in component packaging selection

S. Siddhaye, P. Sheng, C. Ooi, 1999 .

Pharmaceutical product design using combinatorial optimization

Kyle V. Camarda, Elizabeth M. Topp, S. Siddhaye, 2004, Comput. Chem. Eng..

Environmental impact and design parameters in electronics manufacturing-a sensitivity analysis approach

S. Siddhaye, P. Sheng, 2000, Proceedings of the 2000 IEEE International Symposium on Electronics and the Environment (Cat. No.00CH37082).

Integration of environmental factors in process modelling for printed circuit board manufacturing. II. Fabrication

S. Siddhaye, P. Sheng, 1997, Proceedings of the 1997 IEEE International Symposium on Electronics and the Environment. ISEE-1997.