Yen-An Chang

Logic Process Compatible 40NM 16MB, Embedded Perpendicular-MRAM with Hybrid-Resistance Reference, Sub-μA Sensing Resolution, and 17.5NS Read Access Time

Yu-Lin Chen, Yu-Der Chih, Jonathan Chang, 2018, 2018 IEEE Symposium on VLSI Circuits.

Logic Process Compatible 40-nm 16-Mb, Embedded Perpendicular-MRAM With Hybrid-Resistance Reference, Sub- $\mu$ A Sensing Resolution, and 17.5-nS Read Access Time

Yu-Lin Chen, Yu-Der Chih, Chia-Fu Lee, 2019, IEEE Journal of Solid-State Circuits.

13.3 A 22nm 32Mb Embedded STT-MRAM with 10ns Read Speed, 1M Cycle Write Endurance, 10 Years Retention at 150°C and High Immunity to Magnetic Field Interference

Yu-Lin Chen, Harry Chuang, Yu-Der Chih, 2020, 2020 IEEE International Solid- State Circuits Conference - (ISSCC).