Masatada Horiuchi

发表

A dynamic-threshold SOI device with a J-FET embedded source structure and a merged body-bias-control transistor. II. Circuit simulation

Masatada Horiuchi, 2000 .

Electrostatic Force Imaging by Tunneling Acoustic Microscopy

Masatada Horiuchi, Keiji Takata, K. Takata, 1991 .

High-speed alterable, nonvolatile MIS memory

Masatada Horiuchi, 1972 .

High-current small-parasitic-capacitance MOSFET on a poly-Si interlayered (PSI:/spl Psi/) SOI wafer

Kunihiko Yamaguchi, Masatada Horiuchi, K. Yamaguchi, 1998 .

High-current, small parasitic capacitance MOS FET on a poly-Si interlayered (PSI: /spl Psi/) SOI wafer

Kunihiko Yamaguchi, Masatada Horiuchi, M. Horiuchi, 1995, 1995 Symposium on VLSI Technology. Digest of Technical Papers.