J. Sonsky

Novel power transistor design for a process independent high voltage option in standard CMOS

A. Heringa, J. Sonsky, 2006, 2006 IEEE International Symposium on Power Semiconductor Devices and IC's.

Innovative lateral field plates by gate fingers on STI regions in deep submicron CMOS

A. Heringa, J. Sonsky, P.Y. Chiang, 2008, 2008 20th International Symposium on Power Semiconductor Devices and IC's.

Ultra-flexible, layout-enabled field plates for HV transistor integration in SOI-based CMOS

A. Heringa, J. Sonsky, 2007, Proceedings of the 19th International Symposium on Power Semiconductor Devices and IC's.

Innovative High Voltage transistors for complex HV/RF SoCs in baseline CMOS

J. Sonsky, P.Y. Chiang, J. Perez-Gonzalez, 2008, 2008 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA).

Field-Related Failure of GaN-on-Si HEMTs: Dependence on Device Geometry and Passivation

G. Meneghesso, M. Meneghini, E. Zanoni, 2017, IEEE Transactions on Electron Devices.

Dielectric resurf: breakdown voltage control by STI layout in standard CMOS

A. Heringa, J. Sonsky, A. Heringa, 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..