M. S. Bhat

发表

Low Energy and Area Efficient Nonbinary Capacitor Array Based SAR ADC

D. N. Jagadish, M. S. Bhat, 2014, 2014 Fifth International Symposium on Electronic System Design.

Object detection and obstacle avoidance for mobile robot using stereo camera

M. S. Bhat, R. Lagisetty, N. K. Philip, 2013, 2013 IEEE International Conference on Control Applications (CCA).

Design of Resolution Adaptive TIQ Flash ADC using AMS 0.35μm technology

M. S. Bhat, G. Rajashekar, 2008 .

Minimization of Via-Induced Signal Reflection in On-Chip High Speed Interconnect Lines

M. S. Bhat, K. Soorya Krishna, 2012, Circuits Syst. Signal Process..

Improved tri-gate FinFET transistor with InGaAs

M. S. Bhat, Baldeo Sharan Sharma, B. S. Sharma, 2017, 2017 International Conference on Innovations in Information, Embedded and Communication Systems (ICIIECS).

A nonlinear level set model for image deblurring and denoising

A. A. Bini, M. S. Bhat, M. S. Bhat, 2013, The Visual Computer.

Zero delay clocking system in GHz frequency regime using CRLH metamaterial structure

M. S. Bhat, K. K. Soorya, 2012, 2012 International Conference on Devices, Circuits and Systems (ICDCS).

High Level Optimization Methodology for High Performance DSP Systems using Retiming Techniques

M. S. Bhat, Harpreet Mehra, 2018, 2018 IEEE Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER).

Analysis of implant parameters in high voltage TRIPLE RESURF LDMOS for advanced SoC applications

M. S. Bhat, B. Jhnanesh Somayaji, B. J. Somayaji, 2016, 2016 Sixth International Symposium on Embedded Computing and System Design (ISED).

Extrinsic analog synthesis using piecewise linear current-mode circuits

H. S. Jamadagni, M. S. Bhat, S. Rekha, 2006, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06).

Performance enhancement in high speed on-chip interconnect lines

M. S. Bhat, K Soorya Krishna, K. Soorya Krishna, 2010, 2010 5th International Conference on Industrial and Information Systems.

An Extrinsic Method of Evolutionary Synthesis of Multiple-Valued Arithmetic Functions using Genetic Algorithms

H. S. Jamadagni, M. S. Bhat, S. Rekha, 2005, IICAI.

Despeckling low SNR, low contrast ultrasound images via anisotropic level set diffusion

A. A. Bini, M. S. Bhat, M. S. Bhat, 2014, Multidimens. Syst. Signal Process..

Static power minimization in current-mode circuits

H. S. Jamadagni, M. S. Bhat, 2005, ASP-DAC.

Low Energy and Area Efficient Nonbinary Capacitor Array Based Successive Approximation Register Analog-to-Digital Converter

D. N. Jagadish, M. S. Bhat, 2015, J. Low Power Electron..

Triple Reduced Surface Field Drain Extended MOS Device Design and Its RF Performance Evaluation for Sub-Micron RF SoC Platform

M. S. Bhat, B. Jhnanesh Somayaji, 2017, J. Low Power Electron..

Design of high performance dual-gate nano-scale In0.55Ga0.45 as transistor with modified substrate geometry

M. S. Bhat, Baldeo Sharan Sharma, B. S. Sharma, 2017, 2017 IEEE 8th Annual Ubiquitous Computing, Electronics and Mobile Communication Conference (UEMCON).

Library Characterization: Noise and Delay Modeling

M. S. Bhat, Riya Raj, S. Rekha, 2018, 2018 IEEE Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER).

A Scheme for efficient and equitable use of public utilities through supervisory and distributed control

M. S. Bhat, S. Rekha, K. Shreenivasa, 2018, 2018 IEEE Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER).

Compressed Sensing for Energy and Bandwidth Starved IoT Applications

M. S. Bhat, G. Ramachandra, 2018, 2018 IEEE Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER).

Inductive Tuned High Isolation RF MEMS Capacitive Shunt Switches

M. S. Bhat, E. S. Shajahan, B. Chenna Reddy, 2014, 2014 Fifth International Symposium on Electronic System Design.

GSM and GUI Based Remote Data Logging System

M. S. Bhat, Sadeque Reza Khan, Rajsekhar Kr. Nath, 2014, 2014 Fifth International Symposium on Electronic System Design.

Design of Resolution Adaptive TIQ Flash ADC using AMS 0.35μm technology

M. S. Bhat, G. Rajashekar, 2008, 2008 International Conference on Electronic Design.

GUI based industrial monitoring and control system

M. S. Bhat, Sadeque Reza Khan, 2014, 2014 POWER AND ENERGY SYSTEMS: TOWARDS SUSTAINABLE ENERGY.

Power optimization in current mode circuits

H. S. Jamadagni, M. S. Bhat, 2005, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design.

Fabrication and characterisation of RF MEMS capacitive switches tuned for X and Ku bands

M. S. Bhat, E. S. Shajahan, 2018, Int. J. Mechatronics Autom..

Switched inverter comparator based 0.5 V low power 6 bit Flash ADC

M. S. Bhat, T. Laxminidhi, R. Komar, 2012, 2012 10th IEEE International Conference on Semiconductor Electronics (ICSE).

A 1-V 1-GS/s 6-bit low-power flash ADC in 90-nm CMOS with 15.75 mW power consumption

M. S. Bhat, K. Lad, 2013, 2013 International Conference on Computer Communication and Informatics.

Estimation of interconnect metrics using state space approach

M. S. Bhat, K Soorya Krishna, M Pramod, 2010, 2010 5th International Conference on Industrial and Information Systems.

Design of a triple band-notched circular monopole antenna for UWB applications

M. S. Bhat, E. S. Shajahan, B. Chenna Reddy, 2014, 2014 Eleventh International Conference on Wireless and Optical Communications Networks (WOCN).

Smart handheld platform for electrochemical bio sensors

Navakanta Bhat, Suraj Hebbar, Vinay Kumar, 2016, 2016 20th International Symposium on VLSI Design and Test (VDAT).

An 8-b 1.5MS/s 2-bit per cycle SAR ADC with parasitic insensitive single capacitive reference DAC

M. S. Bhat, Tonse Laxminidhi, Kalpana G. Bhat, 2015, TENCON 2015 - 2015 IEEE Region 10 Conference.

High Isolation Single Pole Four Throw RF MEMS Switches for X band

M. S. Bhat, E. S. Shajahan, 2018, 2018 8th International Symposium on Embedded Computing and System Design (ISED).

A 0.5V 300µW 50MS/s 180nm 6bit Flash ADC using inverter based comparators

M. S. Bhat, T. Laxminidhi, R. Komar, 2012, IEEE-International Conference On Advances In Engineering, Science And Management (ICAESM -2012).

A compact 4-to-8-bit nonbinary SAR ADC based on 2 bits per cycle DAC architecture

M. S. Bhat, Tonse Laxminidhi, Kalpana G Bhat, 2019 .

An Extrinsic Method for the Synthesis of Analog Functions using Non-Linear Current-Mode Circuits

H. S. Jamadagni, M. S. Bhat, S. Rekha, 2005, IICAI.

A 500 kS/s 8-bit charge recycle based 2-bit per step SAR-ADC

M. S. Bhat, T. Laxminidhi, P. Shrivastava, 2012, 2012 Third International Conference on Emerging Applications of Information Technology.

Stub mounted loaded line phase shifter using novel RF MEMS switch

M. S. Bhat, E. S. Shajahan, B. Vasudev Anand, 2012, 2012 IEEE International Conference on Electron Devices and Solid State Circuit (EDSSC).

A Low Voltage Inverter Based Differential Amplifier for Low Power Switched Capacitor Applications

D. N. Jagadish, M. S. Bhat, 2014, 2014 Fifth International Symposium on Electronic System Design.

Low Power Data Acquisition System for Bioimplantable Devices

M. S. Bhat, Sadeque Reza Khan, 2014 .

A 10-Bit Differential Ultra-Low-Power SAR ADC with an Enhanced MSB Capacitor-Split Switching Technique

M. S. Bhat, Arulalan M. Rajan, Sreenivasulu Polineni, 2019 .

A novel dual-gate nano-scale InGaAs transistor with modified substrate geometry

M. S. Bhat, Baldeo Sharan Sharma, B. S. Sharma, 2017, 2017 International Conference on Innovations in Electronics, Signal Processing and Communication (IESC).

Design of CMOS RF receiver front-end for IEEE 802.11b

M. S. Bhat, M.S. Bhat, N. Konidala, 2008, 2008 International Conference on Electronic Design.

A 0.3‐V, 2.4‐nW, and 100‐Hz fourth‐order LPF for ECG signal processing

M. S. Bhat, S. Rekha, Sreenivasulu Polineni, 2020, Int. J. Circuit Theory Appl..

A 0.3 V, 56 dB DR, 100 Hz fourth order low-pass filter for ECG acquisition system

M. S. Bhat, G. Hanumanta Rao, Sreenivasulu Polineni, 2019, Microelectron. J..