樽見幸祐

发表

A Design Method for a Low Power Digital FIR Filter in Digital Wireless communication systems

Hiroto Yasuura, Masanori Muroyama, 安浦寛人, 2004 .

A digital filter design method of a baseband processor in a digital wireless communication system for low power

Hiroto Yasuura, 安浦寛人, 辻本泰造, 2003 .

A quality-driven energy reduction methodology for digital wireless communication systems

樽見幸祐, 2006 .

Measurement of Delay and Power Variation in 90nm CMOS Circuits

Hiroto Yasuura, Masanori Muroyama, Yuan Yang, 2006 .

CMOSプロセスにおけるゲート遅延ばらつき測定回路の提案(VLSI回路, デバイス技術(高速・低電圧・低消費電力))

安浦寛人, 室山真徳, 坂本良太, 2005 .

An examination on the method of Energy reduction with bit width control in FFT circuits for digital wireless communications

徳永将之, Hiroto Yasuura, 安浦寛人, 2005 .

A Power Reduction Method for Low-Precision Computation

Hiroto Yasuura, Masanori Muroyama, 安浦寛人, 2005 .

Measurement and Analysis of Delay and Power Variations in 90nm CMOS Circuits

Ryota Sakamoto, 安浦寛人, 石原亨, 2006 .