K. C. Bracken

A low-power analog sampled-data VLSI architecture for equalization and FDTS/DF detection

I. R. Carley, K. C. Bracken, R. Mittal, 1995 .

Adaptive continuous-time equalization followed by FDTS/DF sequence detection

K. C. Bracken, L. R. Carley, 1995 .

Adaptive continuous-time equalization and FDTS/DF sequence detection

K. C. Bracken, L. R. Carley, H. M. Zayed, 1995 .

A low-power backward equalizer for DFE read-channel applications

David J. Allstot, K. C. Bracken, L. R. Carley, 1997 .

BiCMOS analog arbitration circuits

K. C. Bracken, L. R. Carley, 1992, Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting.