S. M. Reddy

Generation of Broadside Transition Fault Test Sets that Detect Four-Way Bridging Faults

Irith Pomeranz, S. M. Reddy, 2006 .

Test enrichment for path delay faults using multiple sets of target faults

Irith Pomeranz, S. M. Reddy, 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

On the design of path delay fault testable combinational circuits

S. M. Reddy, A. K. Pramanick, 1990, [1990] Digest of Papers. Fault-Tolerant Computing: 20th International Symposium.

Application of homing sequences to synchronous sequential circuit testing

Irith Pomeranz, S. M. Reddy, S. Reddy, 1993, Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS).

Aliasing Computation Using Fault Simulation with Fault Dropping

Irith Pomeranz, S. M. Reddy, 1995, IEEE Trans. Computers.

Functional test generation for delay faults in combinational circuits

Irith Pomeranz, S. M. Reddy, 1995, Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

On Error Correction In Macro-based Circuits

Irith Pomeranz, S. M. Reddy, S. Reddy, 1994, IEEE/ACM International Conference on Computer-Aided Design.

Selection of a fault model for fault diagnosis based on unique responses

Irith Pomeranz, S. M. Reddy, 2009 .