Michael Witterauf

发表

Anytime instructions for programmable accuracy floating-point arithmetic

Frank Hannig, Marcel Brand, Michael Witterauf, 2019, CF.

Anytime Floating-Point Addition and Multiplication-Concepts and Implementations

Jürgen Teich, Alberto Bosio, Michael Witterauf, 2020, 2020 IEEE 31st International Conference on Application-specific Systems, Architectures and Processors (ASAP).

Techniques for on-demand structural redundancy for massively parallel processor arrays

Jürgen Teich, Faramarz Khosravi, Brett H. Meyer, 2015, J. Syst. Archit..

Symbolic inner loop parallelisation for massively parallel processor arrays

Jürgen Teich, Frank Hannig, Michael Witterauf, 2014, 2014 Twelfth ACM/IEEE Conference on Formal Methods and Models for Codesign (MEMOCODE).

A co-design approach for fault-tolerant loop execution on Coarse-Grained Reconfigurable Arrays

Jürgen Teich, Faramarz Khosravi, Frank Hannig, 2015, 2015 NASA/ESA Conference on Adaptive Hardware and Systems (AHS).

Efficient Mapping of CNNs onto Tightly Coupled Processor Arrays

Jürgen Teich, Frank Hannig, Michael Witterauf, 2019, J. Comput..

Modulo scheduling of symbolically tiled loops for tightly coupled processor arrays

Jürgen Teich, Frank Hannig, Michael Witterauf, 2016, 2016 IEEE 27th International Conference on Application-specific Systems, Architectures and Processors (ASAP).

Providing fault tolerance through invasive computing

Jürgen Teich, Andreas Weichslgartner, Jürgen Becker, 2016, it Inf. Technol..

Invasive Computing for Predictability of Multiple Non-functional Properties: A Cyber-Physical System Case Study

Jürgen Teich, Frank Hannig, Marcel Brand, 2018, 2018 IEEE 29th International Conference on Application-specific Systems, Architectures and Processors (ASAP).

Constructing Fast and Cycle-Accurate Simulators for Configurable Accelerators Using C++ Templates

Jürgen Teich, Frank Hannig, Michael Witterauf, 2017, 2017 International Symposium on Rapid System Prototyping (RSP).

Symbolic Loop Compilation for Tightly Coupled Processor Arrays pdf

Frank Hannig, Michael Witterauf, Jurgen Teich, 2021, ACM Trans. Embed. Comput. Syst..

Symbolic Multi-Level Loop Mapping of Loop Programs for Massively Parallel Processor Arrays

Jürgen Teich, Frank Hannig, Michael Witterauf, 2018, ACM Trans. Embed. Comput. Syst..

Adaptive fault tolerance through invasive computing

Jürgen Teich, Gregor Snelting, Michael Witterauf, 2015, 2015 NASA/ESA Conference on Adaptive Hardware and Systems (AHS).

Polyhedral fragments: an efficient representation for symbolically generating code for processor arrays

Jürgen Teich, Frank Hannig, Michael Witterauf, 2019, MEMOCODE.

Symbolic loop parallelization for balancing I/O and memory accesses on processor arrays

Jürgen Teich, Frank Hannig, Michael Witterauf, 2015, 2015 ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE).

Run-time Requirement Enforcement for Loop Programs on Processor Arrays

Jürgen Teich, Michael Witterauf, 2018, 2018 16th ACM/IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE).

On-demand fault-tolerant loop processing on massively parallel processor arrays

Jürgen Teich, Frank Hannig, Michael Witterauf, 2015, 2015 IEEE 26th International Conference on Application-specific Systems, Architectures and Processors (ASAP).

*-Predictable MPSoC execution of real-time control applications using invasive computing: *Predictable MPSoC execution of real-time control applications using invasive computing

Jürgen Teich, Frank Hannig, Marcel Brand, 2019 .

A Compiler for Symbolic Code Generation for Tightly Coupled Processor Arrays

Michael Witterauf, 2021 .

Aarith: an arbitrary precision number library

Jürgen Teich, Oliver Keszöcze, Michael Witterauf, 2021, SAC.