N. Akiyama

System in Package (SiP) With Reduced Parasitic Inductance for Future Voltage Regulator

M. Shiraishi, T. Uno, T. Hashimoto, 2009, IEEE Transactions on Power Electronics.

A System-in-Package (SiP) With Mounted Input Capacitors for Reduced Parasitic Inductances in a Voltage Regulator

H. Akagi, T. Uno, T. Hashimoto, 2010, IEEE Transactions on Power Electronics.

Low loss and small SiP for DC-DC converters

M. Shiraishi, N. Akiyama, T. Kawashima, 2005, Proceedings. ISPSD '05. The 17th International Symposium on Power Semiconductor Devices and ICs, 2005..