Kyehyung Lee

A Noise-Coupled Time-Interleaved Delta-Sigma ADC With 4.2 MHz Bandwidth, ${-}$ 98 dB THD, and 79 dB SNDR

Gabor C. Temes, Koichi Hamashita, Kaoru Takasuka, 2008, IEEE Journal of Solid-State Circuits.

A 0.8 V, 2.6 mW, 88 dB Dual-Channel Audio Delta-Sigma D/A Converter With Headphone Driver

Gabor C. Temes, Koichi Hamashita, Un-Ku Moon, 2009, IEEE Journal of Solid-State Circuits.

A design methodology for high-order class-D audio amplifiers

Andrea Baschirotto, Piero Malcovati, Lorenzo Crespi, 2014 .

A 0.8V, 88dB Dual-Channel Audio /spl Delta//spl Sigma/ DAC with Headphone Driver

G.C. Temes, Un-Ku Moon, K. Hamashita, 2006, 2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers..

A low jitter digital timing synchronizer for CAP-based VDSL system

Beomsup Kim, Yongchul Song, Kyehyung Lee, 2001, Proceedings of the 27th European Solid-State Circuits Conference.

Efficient floating double-sampling integrator for DS ADCs

Gabor C. Temes, Jeongseok Chae, Kyehyung Lee, 2007 .

Improved Low-distortion DeltaSigma ADC Topology.

Gabor C. Temes, Kyehyung Lee, 2009, ISCAS 2009.