Wouter Brissinck

Performance evaluation of high performance switches on parallel and distributed computers

Abdellah Touhafi, E. Dirkx, Wouter Brissinck, 1997, Proceedings High Performance Computing on the Information Superhighway. HPC Asia '97.

Scalable Run Time Reconfigurable Architecture

Abdellah Touhafi, Erik F. Dirkx, Wouter Brissinck, 1999, VLSI.

Scheduling and admission control policies: A case study for ATM

Kris Steenhaut, Erik F. Dirkx, Kurt Degieter, 1997, Comput. Networks ISDN Syst..

The Implementation of a Field Programmable Logic Based Co-Processor for the Acceleration of Discrete Event Simulators

Abdellah Touhafi, Erik F. Dirkx, Wouter Brissinck, 1996, FPL.

Development of PVM Code for a Low Latency Switch Based Interconnect

Abdellah Touhafi, Erik F. Dirkx, Wouter Brissinck, 1996, PVM.

Reconfigurable Programming in the Large on Extendable Uniform Reconfigurable Computing Array's: An Integrated Approach Based on Reconfigurable Virtual Architectures

Abdellah Touhafi, Erik F. Dirkx, Wouter Brissinck, 1999, FPL.

Scheduling mechanisms and admission control policies for DQPB and ATM

Kris Steenhaut, Kurt Degieter, Wouter Brissinck, 1995, Other Conferences.

Analysis of large ATM switches using a platform-independent simulation environment

Erik F. Dirkx, Wouter Brissinck, 1998, J. Syst. Archit..