Valerio Tenace

发表

Pass-XNOR logic: A new logic style for P-N junction based graphene circuits

Enrico Macii, Massimo Poncino, Andrea Calimera, 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization pdf

Azadeh Davoodi, Zhiru Zhang, Sergio Bampi, 2020, 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Activation-Kernel Extraction through Machine Learning

Andrea Calimera, Valerio Tenace, A. Calimera, 2017, 2017 New Generation of CAS (NGCAS).

Graphene-PLA (GPLA): A compact and ultra-low power logic array architecture

Enrico Macii, Massimo Poncino, Andrea Calimera, 2016, 2016 International Great Lakes Symposium on VLSI (GLSVLSI).

Enabling quasi-adiabatic logic arrays for silicon and beyond-silicon technologies

Enrico Macii, Massimo Poncino, Andrea Calimera, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

Multiplication by Inference using Classification Trees: A Case-Study Analysis

Roberto Giorgio Rizzo, Andrea Calimera, Valerio Tenace, 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

SAID: A Supergate-Aided Logic Synthesis Flow for Memristive Crossbars

Andrea Calimera, Anupam Chattopadhyay, Valerio Tenace, 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Inferential Logic: a Machine Learning Inspired Paradigm for Combinational Circuits

Andrea Calimera, Valerio Tenace, 2018, 2018 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC).

Ultra-low power circuits using graphene p-n junctions and adiabatic computing

Enrico Macii, Massimo Poncino, Andrea Calimera, 2015, Microprocess. Microsystems.

Logic Synthesis for Silicon and Beyond-Silicon Multi-gate Pass-Logic Circuits

Enrico Macii, Massimo Poncino, Andrea Calimera, 2016, VLSI-SoC.

One-pass logic synthesis for graphene-based Pass-XNOR logic circuits

Enrico Macii, Massimo Poncino, Andrea Calimera, 2015, 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC).

A compression-driven training framework for embedded deep neural networks

Andrea Calimera, Valerio Tenace, Federico Pugliese, 2018, INTESA@ESWEEK.

Layer-Wise Compressive Training for Convolutional Neural Networks

Andrea Calimera, Valerio Tenace, Matteo Grimaldi, 2018, Future Internet.

Logic Synthesis of Pass-Gate Logic Circuits With Emerging Ambipolar Technologies

Enrico Macii, Massimo Poncino, Andrea Calimera, 2020, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Exploiting the Expressive Power of Graphene Reconfigurable Gates via Post-Synthesis Optimization

Giovanni De Micheli, Enrico Macii, Massimo Poncino, 2015, ACM Great Lakes Symposium on VLSI.

NBTI effects on tree-like clock distribution networks

Wei Liu, Enrico Macii, Massimo Poncino, 2012, GLSVLSI '12.

Energy-Efficient Convolutional Neural Networks via Recurrent Data Reuse

Andrea Calimera, Valerio Tenace, Luca Mocerino, 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Quasi-Adiabatic Logic Arrays for Silicon and Beyond-Silicon Energy-Efficient ICs

Enrico Macii, Massimo Poncino, Andrea Calimera, 2016, IEEE Transactions on Circuits and Systems II: Express Briefs.

Multi-function logic synthesis of silicon and beyond-silicon ultra-low power pass-gates circuits

Enrico Macii, Massimo Poncino, Andrea Calimera, 2016, 2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC).

Row-based body-bias assignment for dynamic thermal clock-skew compensation

Enrico Macii, Massimo Poncino, Alberto Macii, 2014, Microelectron. J..

Quasi-exact logic functions through classification trees

Andrea Calimera, Valerio Tenace, 2018, Integr..

NEMO-CNN: An Efficient Near-Memory Accelerator for Convolutional Neural Networks

Pierre-Emmanuel Gaillardon, Valerio Tenace, Grant Brown, 2021, 2021 IEEE 32nd International Conference on Application-specific Systems, Architectures and Processors (ASAP).

Quantifying the figures of merit of graphene-based adiabatic Pass-XNOR Logic (PXL) circuits

Enrico Macii, Massimo Poncino, Andrea Calimera, 2014, 2014 10th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME).