E. Bruls

Quality and reliability impact of defect data analysis

E. Bruls, 1995 .

Analogue fault simulation in standard VHDL : Mixed signal & analogue IC test technology

M. Verstraelen, T. Zwemstra, P. Meijer, 1996 .

Comments on 'Totally self-checking CMOS circuit design for breaks and stuck-on faults'

Manoj Sachdev, E. Bruls, K. Baker, 1993 .

Asynchronous Design: Nightmare Or Opportunity?

E. Bruls, 1997, IEEE Design & Test of Computers.

Design dependency of yield loss due to tungsten residues in spin on glass based planarization processes

W. Maly, E. Bruls, D.K. de Vries, 1997, 1997 IEEE International Symposium on Semiconductor Manufacturing Conference Proceedings (Cat. No.97CH36023).