K. Fujihara

Scalable Two-Transistor Memory (STTM)

H.-J. Kim, H.-K. Kang, J.H. Yi, 2001, International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).

Ni Germano-Salicide Technology for High Performance MOSFETs

K. Fujihara, Siyoung Choi, 2001 .

Design of sub-100 nm CMOSFETs: gate dielectrics and channel engineering

U-In Chung, Moonyong Lee, Woo-Sik Kim, 2000, 2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104).

Highly manufacturable sub-100 nm DRAM integrated with full functionality

J.K. Cho, J.J. Lee, S. Choi, 2002, 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303).

The drive currents improvement of FDSOI MOSFETs with undoped Si epitaxial channel and elevated source/drain structure

Ho-Kyu Kang, Nae-In Lee, K. Fujihara, 2000, 2000 IEEE International SOI Conference. Proceedings (Cat. No.00CH37125).

High performance pMOSFET with BF/sub 3/ plasma doped gate/source/drain and S/D extension

M.Y. Lee, W.S. Kim, K. Fujihara, 1998, International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).

CMOS device scaling beyond 100 nm

K. Fujihara, Sang-Bin Song, H. K. Kang, 2000, International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138).

Effect of polysilicon gate on the flatband voltage shift and mobility degradation for ALD-Al/sub 2/O/sub 3/ gate dielectric

Jongwook Jeon, Moosung Kim, Nae-In Lee, 2000, International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138).

Dielectric characteristics of Al2O3–HfO2 nanolaminates on Si(100)

Kwangho Jeong, Chung-Nam Whang, Hyejin Choi, 2002 .

Thermal stability and structural characteristics of HfO2 films on Si (100) grown by atomic-layer deposition

Je-Hun Lee, Kwangho Jeong, Chung-Nam Whang, 2002 .

The P-SOG filling Shallow Trench Isolation technology for sub-70 nm device

Joo-Tae Moon, U-In Chung, Guk-Hyon Yon, 2003, 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407).