Vasilios I. Kelefouras

发表

Area-Throughput Trade-Offs for SHA-1 and SHA-256 Hash Functions' Pipelined Designs

George Athanasiou, Thanos Stouraitis, George Theodoridis, 2016, J. Circuits Syst. Comput..

A methodology for speeding up loop kernels by exploiting the software information and the memory architecture

Constantinos E. Goutis, Vasilios I. Kelefouras, Angeliki Kritikakou, 2015, Comput. Lang. Syst. Struct..

A Matrix–Matrix Multiplication methodology for single/multi-core architectures using SIMD

Constantinos E. Goutis, Vasilios I. Kelefouras, Angeliki Kritikakou, 2014, The Journal of Supercomputing.

A Methodology for Speeding up MVM for Regular, Toeplitz and Bisymmetric Toeplitz Matrices

Constantinos E. Goutis, Vasilios I. Kelefouras, Angeliki Kritikakou, 2014, J. Signal Process. Syst..

A high-performance matrix–matrix multiplication methodology for CPU and GPU architectures

Iosif Mporas, Vasilios I. Kelefouras, Vasileios Kolonias, 2016, The Journal of Supercomputing.

A data locality methodology for matrix–matrix multiplication algorithm

George Athanasiou, Constantinos E. Goutis, Harris E. Michail, 2010, The Journal of Supercomputing.

Near-Optimal Microprocessor and Accelerators Codesign with Latency and Throughput Constraints

George Athanasiou, Francky Catthoor, Constantinos E. Goutis, 2013, TACO.

A systematic approach to classify design-time global scheduling techniques

Francky Catthoor, Constantinos E. Goutis, Vasilios I. Kelefouras, 2013, CSUR.

Array Size Computation under Uniform Overlapping and Irregular Accesses

Francky Catthoor, Constantinos E. Goutis, Vasilios I. Kelefouras, 2016, TODE.

Near-optimal and scalable intrasignal in-place optimization for non-overlapping and irregular access schemes

Francky Catthoor, Constantinos E. Goutis, Vasilios I. Kelefouras, 2013, TODE.

A scalable and near-optimal representation of access schemes for memory management

Francky Catthoor, Constantinos E. Goutis, Vasilios I. Kelefouras, 2014, TACO.

A methodology for speeding up edge and line detection algorithms focusing on memory architecture utilization

Constantinos E. Goutis, Vasilios I. Kelefouras, Angeliki Kritikakou, 2013, The Journal of Supercomputing.

Combining Software Cache Partitioning and Loop Tiling for Effective Shared Cache Management

Nikos S. Voros, Vasilios I. Kelefouras, Georgios Keramidas, 2018, ACM Trans. Embed. Comput. Syst..

A template-based methodology for efficient microprocessor and FPGA accelerator co-design

George Athanasiou, Francky Catthoor, Constantinos E. Goutis, 2012, 2012 International Conference on Embedded Computer Systems (SAMOS).

A Methodology for Speeding Up Fast Fourier Transform Focusing on Memory Architecture Utilization

George Athanasiou, Constantinos E. Goutis, Nikolaos S. Alachiotis, 2011, IEEE Transactions on Signal Processing.

Cache Partitioning + Loop Tiling: A Methodology for Effective Shared Cache Management

Nikos S. Voros, Vasilios I. Kelefouras, Georgios Keramidas, 2017, 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

A methodology for speeding up matrix vector multiplication for single/multi-core architectures

Constantinos E. Goutis, Vasilios I. Kelefouras, Angeliki Kritikakou, 2015, The Journal of Supercomputing.

A Hierarchical Profiler of Intermediate Representation Code based on LLVM

Nikos S. Voros, Vasilios I. Kelefouras, Georgios Keramidas, 2021, 2021 10th Mediterranean Conference on Embedded Computing (MECO).

XANDAR: X-by-Construction Design framework for Engineering Autonomous & Distributed Real-time Embedded Software Systems

Vahid Garousi, Dominik Reinhardt, Sakir Sezer, 2021, 2021 31st International Conference on Field-Programmable Logic and Applications (FPL).

An Analytical Model for Loop Tiling Transformation

Vasilios I. Kelefouras, N. Voros, G. Keramidas, 2021, SAMOS.

A Array Size Computation under Uniform Overlapping & Irregular Accesses

Vasilios I. Kelefouras, F. Catthoor, C. Goutis, 2017 .

Anatomy of Deep Learning Image Classification and Object Detection on Commercial Edge Devices: A Case Study on Face Mask Detection

Vasilios I. Kelefouras, P. Kourtessis, I. Mporas, 2022, IEEE Access.

XANDAR: Exploiting the X-by-Construction Paradigm in Model-based Development of Safety-critical Systems

Vasilios I. Kelefouras, Christos P. Antonopoulos, V. Garousi, 2022, 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE).

A Methodology for Efficient Tile Size Selection for Affine Loop Kernels

Vasilios I. Kelefouras, N. Voros, G. Keramidas, 2022, International Journal of Parallel Programming.

A methodology for speeding up edge and line detection algorithms focusing on memory architecture utilization

Vasilios I. Kelefouras, C. Goutis, A. Kritikakou, 2014, The Journal of Supercomputing.

A data locality methodology for matrix–matrix multiplication algorithm

Nikolaos S. Alachiotis, Vasilios I. Kelefouras, C. Goutis, 2012, The Journal of Supercomputing.

On the exploitation of a high-throughput SHA-256 FPGA design for HMAC

Vasilios I. Kelefouras, HARRIS E. MICHAIL, GEORGE S. ATHANASIOU, 2012, TRETS.

A methodology for efficient code optimizations and memory management

Vasilios I. Kelefouras, K. Djemame, 2018, CF.

Contactless Camera-Based Heart Rate and Respiratory Rate Monitoring Using AI on Hardware

Vasilios I. Kelefouras, P. Kourtessis, I. Mporas, 2023, Sensors.

A methodology pruning the search space of six compiler transformations by addressing them together as one problem and by exploiting the hardware architecture details

Vasilios I. Kelefouras, Vasilios Kelefouras, V. Kelefouras, 2017, Computing.

Vasilios I. Kelefouras, I. Stamoulis, Theologos Anthimopoulos, 2024, CF.