Cherrice Traver

发表

Proceedings : Eighth Annual IEEE International ASIC Conference and Exhibit

William A. Cook, Richard A. Hull, Cherrice Traver, 1995 .

A comparison of synchronous and asynchronous FSMD designs

Cherrice Traver, Richard Auletta, Robert B. Reese, 1993, Proceedings of 1993 IEEE International Conference on Computer Design ICCD'93.

A Coarse-Grain Phased Logic CPU

Mitchell A. Thornton, Cherrice Traver, Robert B. Reese, 2005, IEEE Trans. Computers.

Rapid-prototyping of high-assurance systems

Cherrice Traver, Richard Auletta, 1993, [1993] Proceedings Third Great Lakes Symposium on VLSI-Design Automation of High Performance VLSI Systems.

Analyzing and verifying locally clocked circuits with the concurrency workbench

Cherrice Traver, David Hemmendinger, Garth Baulch, 1995, Proceedings. Fifth Great Lakes Symposium on VLSI.

The multidisciplinary international virtual design studio (MIVDS)

Leila Notash, Ronald B. Bucinell, Ismet Erkmen, 2000, IEEE Trans. Educ..

A Freshman Engineering Course Which Introduces Engineering Design And Engineering Fundamentals In The Context Of A Unifying Theme

Cherrice Traver, F. Wicks, James Hedrick, 2001 .

Women Engineers in Advanced Academic Positions (WEAAP): Effecting Change in Higher Education

Cheryl Schrader, Mary J. S. Roth, Cherrice Traver, 2009 .

A coarse-grain phased logic CPU

Mitchell A. Thornton, Cherrice Traver, Robert B. Reese, 2005, IEEE Transactions on Computers.

A fine-grain Phased Logic CPU

Mitchell A. Thornton, Cherrice Traver, Robert B. Reese, 2003, IEEE Computer Society Annual Symposium on VLSI, 2003. Proceedings..

Arithmetic logic circuits using self-timed bit level dataflow and early evaluation

Mitchell A. Thornton, Cherrice Traver, Robert B. Reese, 2001, Proceedings 2001 IEEE International Conference on Computer Design: VLSI in Computers and Processors. ICCD 2001.

P.O. Pistilli Undergraduate Scholarships for Advancement in Computer Science and Electrical Engineering

Louise Trevillyan, Cherrice Traver, Tiffany Lynn Stokley, 2008 .

Early evaluation for performance enhancement in phased logic

Mitchell A. Thornton, Cherrice Traver, Robert B. Reese, 2005, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

International Robotics Design Competitions: Potential And Pitfalls

Cherrice Traver, John Spinelli, 1999 .

Women Engineers In Advanced Academic Positions (Weaap)

Cheryl Schrader, Mary J. S. Roth, Cherrice Traver, 2009 .

IEEE Real World Engineering Projects (RWEP)

Chris J. B. Macnab, Cherrice Traver, Burton Dicht, 2012 .

Integration Of Engineering And The Liberal Arts: A Two Way Street

Cherrice Traver, J. Douglas Klein, 2010 .

Jan Willis - Senior Vice President, Industry Alliances, Cadence Design Systems, Inc. For her significant contributions in helping women advance in the field of EDA technology. The P. O. Pistilli Undergraduate Scholarships for Advancement in Computer Science and Electrical Engineering

Cherrice Traver, Sean Sanders, 2007 .

Performance enhancement in phased logic circuits using automatic slack-matching buffer insertion

Lun Li, Mitchell A. Thornton, Cherrice Traver, 2004, GLSVLSI '04.

Generalized early evaluation in self-timed circuits

Mitchell A. Thornton, Cherrice Traver, Robert B. Reese, 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

Introducing Freshmen To Engineering Design: Weather Station Project

Cherrice Traver, Jagdish T. Gajjar, Brian S Macherone, 2000 .

Digital design automation

Cherrice Traver, 2003 .

Special session - inventive courses: Blending engineering and the liberal arts

Sharon A. Jones, Cherrice Traver, J. Douglass Klein, 2009, 2009 39th IEEE Frontiers in Education Conference.

Guest Editorial Introduction to the Special Issue on the 1995 IEEE ASIC Conference

Cherrice Traver, K. W. Hsu, 1996, IEEE Trans. Very Large Scale Integr. Syst..

Fostering Innovation through the Integration of Engineering and Liberal Education

Steven B. Shooter, Cherrice Traver, David Gillette, 2011 .