Eddy Kunnen

A way to integrate multiple block layers for middle of line contact patterning

Julien Ryckaert, Janko Versluijs, Steven Demuynck, 2015, Advanced Lithography.

CMOS patterning over high-aspect ratio topographies for N10/N7 using spin-on carbon hardmasks

Naoto Horiguchi, Monique Ercken, Yoshiaki Kikuchi, 2017, Advanced Lithography.

Process development using negative tone development for the dark field critical layers in a 28nm node process

Vincent Wiaux, Peter De Bisschop, Monique Ercken, 2012, Advanced Lithography.

Spacer defined double patterning for (sub-)20nm half pitch single damascene structures

Vincent Wiaux, Harold Dekkers, Gerald Beyer, 2011, Advanced Lithography.

Spacer defined FinFET: Active area patterning of sub-20nm fins with high density

Rita Rooyackers, Denis Shamiryan, Nadine Collaert, 2007 .

The etchback approach: Enlarged process window for MuGFET gate etching

Rita Rooyackers, Nadine Collaert, Malgorzata Jurczak, 2006 .