Chulwoo Kim

发表

A low-voltage high-efficiency voltage doubler for thermoelectric energy harvesting

Chulwoo Kim, Philip K. T. Mok, Jungmoon Kim, 2013, 2013 IEEE International Conference of Electron Devices and Solid-state Circuits.

A 1.0-ns/1.0-V Delay-Locked Loop With Racing Mode and Countered CAS Latency Controller for DRAM Interfaces

Chulwoo Kim, Hoon Choi, Hyun-Woo Lee, 2012, IEEE J. Solid State Circuits.

Physically Unclonable Function Using Ring Oscillator Collapse in 0.5 V Near-Threshold Voltage for Low-Power Internet of Things

Chulwoo Kim, Jeongsik Yoo, Doyoun Kim, 2018, 2018 IEEE International Conference on Consumer Electronics - Asia (ICCE-Asia).

High-Bandwidth Memory Interface

Chulwoo Kim, Hyun-Woo Lee, Junyoung Song, 2014, Springer Briefs in Electrical and Computer Engineering.

A Low-Power Post-LPDDR4 Interface Using AC Termination at RX and an Active Inductor at TX

Chulwoo Kim, Jeongsik Yoo, Hyunsu Park, 2018, IEEE Transactions on Circuits and Systems II: Express Briefs.

A 247 µW 800 Mb/s/pin DLL-Based Data Self-Aligner for Through Silicon via (TSV) Interface

Chulwoo Kim, Hyun-Woo Lee, Junyoung Song, 2012, IEEE Journal of Solid-State Circuits.

3-Gb/s High-Speed True Random Number Generator Using Common-Mode Operating Comparator and Sampling Uncertainty of D Flip-Flop

Chulwoo Kim, Sang-Geun Bae, Yongtae Kim, 2017, IEEE Journal of Solid-State Circuits.

Noise-aware domino logic design for deep submicron technology

Chulwoo Kim, Seok-Soo Yoon, Seok-Ryong Yoon, 2003, 2003 IEEE Conference on Electron Devices and Solid-State Circuits (IEEE Cat. No.03TH8668).

12-Gb/s Over Four Balanced Lines Utilizing NRZ Braid Clock Signaling With No Data Overhead and Spread Transition Scheme for 8K UHD Intra-Panel Interfaces

Chulwoo Kim, Jaehun Jun, Junyoung Song, 2019, IEEE Journal of Solid-State Circuits.

Robust transceiver based on worst-case SINR optimization for MIMO interfering broadcast channels with imperfect channel knowledge

Chulwoo Kim, Soo-Won Kim, Young-Chai Ko, 2013, 2013, 7th International Conference on Signal Processing and Communication Systems (ICSPCS).

A 5-Bit 500-MS/S Flash ADC using Time-Domain Comparison

Chulwoo Kim, Soo-Won Kim, Gil-Su Kim, 2012, J. Circuits Syst. Comput..

A near-threshold all-digital PLL with a bootstrapped DCO using low-dropout regulator for mitigating PVT-variations

Chulwoo Kim, Jaehun Jun, Sangsu Lee, 2017, 2017 International SoC Design Conference (ISOCC).

A 366kS/s 400uW 0.0013mm2 frequency-to-digital converter based CMOS temperature sensor utilizing multiphase clock

Chulwoo Kim, Kisoo Kim, Hokyu Lee, 2009, 2009 IEEE Custom Integrated Circuits Conference.

10-bit 100-MS/s Pipelined ADC Using Input-Swapped Opamp Sharing and Self-Calibrated V/I Converter

Chulwoo Kim, Jinwoo Kim, Moo-young Kim, 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Memory Interfaces: Past, Present, and Future

Chulwoo Kim, Hyun-Woo Lee, Junyoung Song, 2016, IEEE Solid-State Circuits Magazine.

Evaluating and Improving a Self-Help Technical Support Web Site: Use of Focus Group Interviews

Chulwoo Kim, Jan P. Allebach, Mark R. Lehto, 2006, Int. J. Hum. Comput. Interact..

A Compact and High Performance Switch for Circuit-Switched Network-On-Chip

Chulwoo Kim, Yogendera Kumar, Phi-Hung Pham, 2006, 2006 IEEE International SOC Conference.

Edge pursuit comparator with application in a 74.1dB SNDR, 20KS/s 15b SAR ADC

Chulwoo Kim, David Blaauw, Dennis Sylvester, 2018, 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC).

TSV Interface for DRAM

Chulwoo Kim, Junyoung Song, Hyun-Woo Lee, 2014 .

A 10MHz to 315MHz cascaded hybrid PLL with piecewise linear calibrated TDC

Chulwoo Kim, Minyoung Song, Young-Ho Kwak, 2009, 2009 IEEE Custom Integrated Circuits Conference.

A 1.6 V 1.4 Gbp/s/pin Consumer DRAM With Self-Dynamic Voltage Scaling Technique in 44 nm CMOS Technology

Chulwoo Kim, Hyun-Woo Lee, Young-Jung Choi, 2011, IEEE Journal of Solid-State Circuits.

250 Mbps–5 Gbps Wide-Range CDR With Digital Vernier Phase Shifting and Dual-Mode Control in 0.13 $\mu$m CMOS

Chulwoo Kim, Deog-Kyoon Jeong, Woo-Seok Choi, 2011, IEEE Journal of Solid-State Circuits.

A 250-Mb/s to 6-Gb/s Referenceless Clock and Data Recovery Circuit With Clock Frequency Multiplier

Chulwoo Kim, Jayoung Kim, Junyoung Song, 2017, IEEE Transactions on Circuits and Systems II: Express Briefs.

A $\Delta\Sigma$ Modulator-Based Spread-Spectrum Clock Generator with Digital Compensation and Calibration for Phase-Locked Loop Bandwidth

Chulwoo Kim, Junyoung Song, Yeonho Lee, 2019, IEEE Transactions on Circuits and Systems II: Express Briefs.

A 42nJ/conversion on-demand state-of-charge indicator for miniature IoT Li-ion batteries

Chulwoo Kim, David Blaauw, Dennis Sylvester, 2017, 2017 Symposium on VLSI Circuits.

A digitally controlled DC-DC buck converter with bang-bang control

Chulwoo Kim, Heejun Kim, Jungmoon Kim, 2014, 2014 International Conference on Electronics, Information and Communications (ICEIC).

A Self-Calibrated DLL-Based Clock Generator for an Energy-Aware EISC Processor

Chulwoo Kim, Seon Wook Kim, Gilwon Yoon, 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A Scalable Bandwidth Mismatch Calibration Technique for Time-Interleaved ADCs

Chulwoo Kim, Jintae Kim, Yunsoo Park, 2016, IEEE Transactions on Circuits and Systems I: Regular Papers.

A 0.31–1 GHz Fast-Corrected Duty-Cycle Corrector With Successive Approximation Register for DDR DRAM Applications

Chulwoo Kim, Soo-Won Kim, Chan-Hui Jeong, 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A wide-range all-digital multiphase DLL with supply noise tolerance

Chulwoo Kim, Kwan-Weon Kim, Kisoo Kim, 2008, 2008 IEEE Asian Solid-State Circuits Conference.

Low Power Cache with Successive Tag Comparison Algorithm

Chulwoo Kim, Soo-Won Kim, Tae-Chan Kim, 2003, PATMOS.

A Near-Threshold Voltage Oriented Digital Cell Library for High-Energy Efficiency and Optimized Performance in 65nm CMOS Process

Chulwoo Kim, Jaehun Jun, Jaegeun Song, 2018, IEEE Transactions on Circuits and Systems I: Regular Papers.

A 400 MHz–1.5 GHz all digital integer-N PLL with a reference spur reduction technique

Chulwoo Kim, Junyoung Song, Sewook Hwang, 2014 .

An adaptive-bandwidth PLL for avoiding noise interference and DFE-less fast precharge sampling for over 10Gb/s/pin graphics DRAM interface

Chulwoo Kim, Hyun-Woo Lee, Yunsaing Kim, 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

A 120-MHz–1.8-GHz CMOS DLL-Based Clock Generator for Dynamic Frequency Scaling

Chulwoo Kim, Soo-Won Kim, Young-Ho Kwak, 2006, IEEE Journal of Solid-State Circuits.

Design and Implementation of an On-Chip Permutation Network for Multiprocessor System-On-Chip

Chulwoo Kim, Jongsun Park, Junyoung Song, 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

10-bit 100MS/s CMOS pipelined A/D converter with 0.59pJ/conversion-step

Chulwoo Kim, Jinwoo Kim, Tagjong Lee, 2008, 2008 IEEE Asian Solid-State Circuits Conference.

CMOS Digital Integrated Circuits: Analysis & Design, 4th Edition

Chulwoo Kim, Sung-Mo Kang, Yusuf Leblebici, 2014 .

31% Reduction of power consumption using active inductor at TX and AC termination at RX for a low-power post-LPDDR4 interfaces

Chulwoo Kim, Jeongsik Yoo, Hyunsu Park, 2018, 2018 International Conference on Electronics, Information, and Communication (ICEIC).

A 140-Mb/s to 1.82-Gb/s Continuous-Rate Embedded Clock Receiver for Flat-Panel Displays

Chulwoo Kim, Taejin Kim, Daejung Shin, 2009, IEEE Transactions on Circuits and Systems II: Express Briefs.

Low-power small-area ±7.28 ps jitter 1 GHz DLL-based clock generator

Chulwoo Kim, In Chul Hwang, Sung Mo Kang, 2002 .

A 6-bit 2.5-GS/s Time-Interleaved Analog-to-Digital Converter Using Resistor-Array Sharing Digital-to-Analog Converter

Chulwoo Kim, Aurangozeb, Jintae Kim, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A monolithic voltage-mode DC-DC converter with a novel oscillator and ramp generator

Chulwoo Kim, Jungmoon Kim, Hyunho Chu, 2008, IEICE Electron. Express.

A wide-range duty-independent all-digital multiphase clock generator

Chulwoo Kim, Sangdon Jung, Hyunsoo Chae, 2007, ESSCIRC 2007 - 33rd European Solid-State Circuits Conference.

A 100-nW 9.1-ENOB 20-kS/s SAR ADC for Portable Pulse Oximeter

Chulwoo Kim, Sejin Park, Hokyu Lee, 2015, IEEE Transactions on Circuits and Systems II: Express Briefs.

A TDC-based skew compensation technique for high-speed output driver

Chulwoo Kim, Debashis Dhar, Inhwa Jung, 2012, 2012 International SoC Design Conference (ISOCC).

A 7 ps Jitter 0.053 mm $^{2}$ Fast Lock All-Digital DLL With a Wide Range and High Resolution DCC

Chulwoo Kim, Janghoon Song, Dongsuk Shin, 2009, IEEE Journal of Solid-State Circuits.

Decision Theoretic Perspective on Optimizing Intelligent Help

Chulwoo Kim, Mark R. Lehto, M. Lehto, 2007, HCI.

A 3.5 GHz Spread-Spectrum Clock Generator With a Memoryless Newton-Raphson Modulation Profile

Chulwoo Kim, Sewook Hwang, Minyoung Song, 2012, IEEE Journal of Solid-State Circuits.

A low-power cache with successive tag comparison algorithm

Tae Chan Kim, Bong Young Chung, Chulwoo Kim, 2005 .

A One-Cycle Lock Time Slew-Rate-Controlled Output Driver

Chulwoo Kim, Young-Jung Choi, Hyung-Dong Lee, 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

A 42nJ/conversion on-demand state-of-charge indicator for miniature IoT Li-ion batteries

Chulwoo Kim, David Blaauw, Dennis Sylvester, 2018, 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC).

A 0.76-1.75V 0.35mm 2 Fast Adaptive Digital Voltage Regulator with Dual Loop Controls

Chulwoo Kim, Gilwon Yoon, Janghoon Song, 2006 .

A 6 Gb/s transmitter with data-dependent jitter reduction technique for displayport physical layer

Chulwoo Kim, Junyoung Song, Sewook Hwang, 2014 .

An on-chip soft-start technique of current-mode DC-DC converter for biomedical applications

Chulwoo Kim, Jungmoon Kim, Jihwan Kim, 2010, 2010 IEEE Asia Pacific Conference on Circuits and Systems.

An I/O Line Configuration and Organization of DRAM

Chulwoo Kim, Junyoung Song, Hyun-Woo Lee, 2014 .

A CMOS DLL-based 120MHz to 1.8GHz clock generator for dynamic frequency scaling

Chulwoo Kim, Soo-Won Kim, Young-Ho Kwak, 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory

Rolf Drechsler, Chip-Hong Chang, Chulwoo Kim, 2019, IEEE Trans. Very Large Scale Integr. Syst..

A Low-Jitter Open-Loop All-Digital Clock Generator With Two-Cycle Lock-Time

Chulwoo Kim, Moo-young Kim, Sunghwa Ok, 2007, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

An Efficient Adaptive Digital DC-DC Converter with Dual Loop Controls for Fast Dynamic Voltage Scaling

Chulwoo Kim, Gilwon Yoon, Janghoon Song, 2006, IEEE Custom Integrated Circuits Conference 2006.

A 2-Gb/s/ch Data-Dependent Swing-Limited On-Chip Signaling for Single-Ended Global I/O in SDRAM

Chulwoo Kim, Junyoung Song, Jungtaek You, 2017, IEEE Transactions on Circuits and Systems II: Express Briefs.

A 5-GHz Subsampling PLL-Based Spread-Spectrum Clock Generator by Calibrating the Frequency Deviation

Chulwoo Kim, Sang-Geun Bae, Gyungmin Kim, 2017, IEEE Transactions on Circuits and Systems II: Express Briefs.

In-Cell Self-Capacitive-Type Mobile Touch System and Embedded Readout Circuit in Display Driver IC

Chulwoo Kim, Jong-Sang Baek, Jae-Hun Jun, 2016, Journal of Display Technology.

Fully Integrated Low-Power Energy Harvesting System With Simplified Ripple Correlation Control for System-on-a-Chip Applications

Chulwoo Kim, Junwon Jeong, Minseob Shim, 2019, IEEE Transactions on Power Electronics.

10–315-MHz Cascaded Hybrid Phase-Locked Loop for Pixel Clock Generation

Chulwoo Kim, Hojin Park, Minyoung Song, 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A 64-PE folded-torus intra-chip communication fabric for guaranteed throughput in Network-on-Chip based applications

Chulwoo Kim, Phi-Hung Pham, Phuong Mau, 2009, 2009 IEEE Custom Integrated Circuits Conference.

Current-mode DC-DC buck converter with reliable hysteretic-mode control and dual modulator for fast dynamic voltage scaling

Chulwoo Kim, Jungmoon Kim, Hyunho Chu, 2009, 2009 52nd IEEE International Midwest Symposium on Circuits and Systems.

A DC-DC boost converter with variation tolerant MPPT technique and efficient ZCS circuit for thermoelectric energy harvesting applications

Chulwoo Kim, Heejun Kim, Jungmoon Kim, 2014, 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC).

17.6 1V 10Gb/s/pin single-ended transceiver with controllable active-inductor-based driver and adaptively calibrated cascade-DFE for post-LPDDR4 interfaces

Chulwoo Kim, Hyun-Woo Lee, Jayoung Kim, 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.

F2: Memory trends: From big data to wearable devices

Chulwoo Kim, Antoine Dupret, Fatih Hamzaoglu, 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.

A 7.5-Gb/s Referenceless Transceiver With Adaptive Equalization and Bandwidth-Shifting Technique for Ultrahigh-Definition Television in a 0.13- $\mu\hbox{m}$ CMOS Process

Chulwoo Kim, Hyun-Woo Lee, Junyoung Song, 2014, IEEE Transactions on Circuits and Systems II: Express Briefs.

A fast-lock synchronous multi-phase clock generator based on a time-to-digital converter

Chulwoo Kim, Young-Jung Choi, Jabeom Koo, 2009, 2009 IEEE International Symposium on Circuits and Systems.

A $4\times 5$ -Gb/s 1.12- $\mu \text{s}$ Locking Time Reference-Less Receiver With Asynchronous Sampling-Based Frequency Acquisition and Clock Shared Subchannels

Chulwoo Kim, Junyoung Song, Sewook Hwang, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

ProMINoC: An efficient Network-on-Chip design for flexible data permutation

Chulwoo Kim, Jongsun Park, Phi-Hung Pham, 2010, IEICE Electron. Express.

Noise-Aware Split-Path Domino Logic and its Clock Delaying Scheme

Chulwoo Kim, Dongkyu Park, Inhwa Jung, 2007, J. Circuits Syst. Comput..

A 0.17–1.4GHz low-jitter all digital DLL with TDC-based DCC using pulse width detection scheme

Chulwoo Kim, Suki Kim, Young-Jung Choi, 2008, ESSCIRC 2008 - 34th European Solid-State Circuits Conference.

A CMOS Magnetic Hall Sensor Using a Switched Biasing Amplifier

Chulwoo Kim, Soo-Won Kim, Chan-Keun Kwon, 2012, IEEE Sensors Journal.

A low-power programmable DLL-based clock generator with wide-range anti-harmonic lock

Chulwoo Kim, Jabeom Koo, Sunghwa Ok, 2009, 2009 International SoC Design Conference (ISOCC).

PVT Variation Tolerant Current Source With On-Chip Digital Self-Calibration

Chulwoo Kim, Hokyu Lee, Moo-young Kim, 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

F6: Energy-efficient I/O design for next-generation systems

Chulwoo Kim, Elad Alon, Frank O'Mahony, 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).

A 0.15 V Input Energy Harvesting Charge Pump With Dynamic Body Biasing and Adaptive Dead-Time for Efficiency Improvement

Chulwoo Kim, Philip K. T. Mok, Jungmoon Kim, 2014, IEEE Journal of Solid-State Circuits.

Analysis and evaluation of traffic-performance in a backtracked routing network-on-chip

Chulwoo Kim, Xuan-Tu Tran, Phi-Hung Pham, 2008, 2008 Second International Conference on Communications and Electronics.

A Novel Architecture for Block Interleaving Algorithm in MB-OFDM Using Mixed Radix System

Chulwoo Kim, Youngsun Han, Seon Wook Kim, 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A 7.5Gb/s referenceless transceiver for UHDTV with adaptive equalization and bandwidth scanning technique in 0.13µm CMOS process

Chulwoo Kim, Hyun-Woo Lee, Junyoung Song, 2013, 2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC).

Low-power adiabatic computing with NMOS energy recovery logic

Chulwoo Kim, Sung-Mo Kang, Seung Moon Yoo, 2000 .

An efficient architecture of encoder and decoder for DisplayPort physical layer

Chulwoo Kim, Junyoung Song, Yongtae Kim, 2009, 2009 Digest of Technical Papers International Conference on Consumer Electronics.

Session 18 overview: High-bandwidth DRAM

Chulwoo Kim, Martin Brox, 2016, ISSCC.

A DC-DC converter with a dual VCDL-based ADC and a self-calibrated DLL-based clock generator for an energy-aware EISC processor

Chulwoo Kim, Sewook Hwang, Kyeong-Min Kim, 2008, 2008 IEEE Custom Integrated Circuits Conference.

An Energy-Efficient Fast Maximum Power Point Tracking Circuit in an 800-μW Photovoltaic Energy Harvester

Chulwoo Kim, Soo-Won Kim, Sangjin Kim, 2013, IEEE Transactions on Power Electronics.

A 1.3 V input fast-transient-response time digital low-dropout regulator with a VSSa generator for DVFS system

Chulwoo Kim, Soo-Won Kim, Youngsun Han, 2017, IEICE Electron. Express.

A digital low-dropout(DLDO) regulator with 14dB power supply rejection enhancement

Chulwoo Kim, Byung Gun Joung, Yangho Seo, 2016, 2016 International SoC Design Conference (ISOCC).

Small-area high-accuracy ODT/OCD by calibration of global on-chip for 512M GDDR5 application

Chulwoo Kim, Gil-Su Kim, Young-Jung Choi, 2009, 2009 IEEE Custom Integrated Circuits Conference.

Piecewise Linear Modulation Technique for Spread Spectrum Clock Generation

Chulwoo Kim, Yongtae Kim, Minyoung Song, 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A 283.2μW 800Mb/s/pin DLL-based data self-aligner for Through-Silicon Via (TSV) interface

Chulwoo Kim, Hyun-Woo Lee, Yunsaing Kim, 2012, 2012 IEEE International Solid-State Circuits Conference.

Exploiting Thread-Level Parallelism in Lockstep Execution by Partially Duplicating a Single Pipeline

Chulwoo Kim, Seon Wook Kim, Seok Joong Hwang, 2008 .

An On-Chip Network Fabric Supporting Coarse-Grained Processor Array

Chulwoo Kim, Jungmoon Kim, Phi-Hung Pham, 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

An anti-harmonic, programmable DLL-based frequency multiplier for dynamic frequency scaling

Chulwoo Kim, Soo-Won Kim, Jabeom Koo, 2007, 2007 IEEE Asian Solid-State Circuits Conference.

12Gb/s over four balanced lines utilizing NRZ braid clock signaling with 100% data payload and spread transition scheme for 8K UHD intra-panel interface

Chulwoo Kim, Yeonho Lee, Yoonjae Choi, 2018, 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC).

23.3 A 3-bit/2UI 27Gb/s PAM-3 Single-Ended Transceiver Using One-Tap DFE for Next-Generation Memory Interface

Chulwoo Kim, Hyunsu Park, Junyoung Song, 2019, 2019 IEEE International Solid- State Circuits Conference - (ISSCC).

A Single-Inductor Eight-Channel Output DC–DC Converter With Time-Limited Power Distribution Control and Single Shared Hysteresis Comparator

Chulwoo Kim, Jungmoon Kim, Dong Seok Kim, 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.

Design and Implementation of Backtracking Wave-Pipeline Switch to Support Guaranteed Throughput in Network-on-Chip

Chulwoo Kim, Jongsun Park, Phi-Hung Pham, 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A Low-Jitter Open-Loop All-Digital Clock Generator with 2 Cycle Lock-Time

Chulwoo Kim, Moo-young Kim, Dongsuk Shin, 2007, 2007 IEEE Custom Integrated Circuits Conference.

A High-Efficiency Charger With Adaptive Input Ripple MPPT for Low-Power Thermoelectric Energy Harvesting Achieving 21% Efficiency Improvement

Chulwoo Kim, Junwon Jeong, Minseob Shim, 2020, IEEE Transactions on Power Electronics.

25.3 A 1.35V 5.0Gb/s/pin GDDR5M with 5.4mW standby power and an error-adaptive duty-cycle corrector

Chulwoo Kim, Hoon Choi, Jaejin Lee, 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).

Low-power architecture for A 6-bit 1.6GS/s flash A/D converter

Chulwoo Kim, Jinwoo Kim, Moo-Young Kim, 2009, 2009 Digest of Technical Papers International Conference on Consumer Electronics.

Survey and Analysis of Delay-Locked Loops Used in DRAM Interfaces

Chulwoo Kim, Hyun-Woo Lee, 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A 42 nJ/Conversion On-Demand State-of-Charge Indicator for Miniature IoT Li-Ion Batteries

Chulwoo Kim, David Blaauw, Dennis Sylvester, 2019, IEEE Journal of Solid-State Circuits.

A Spread Spectrum Clock Generator With Nested Modulation Profile for a High-Resolution Display System

Chulwoo Kim, Jaehun Jun, Yeonho Lee, 2018, IEEE Transactions on Circuits and Systems II: Express Briefs.

A New Energy x Delay-Aware Flip-Flop

Chulwoo Kim, Seon Wook Kim, Moo-young Kim, 2006, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

A 2.4 GHz 0.1-Fref-Bandwidth All-Digital Phase-Locked Loop With Delay-Cell-Less TDC

Chulwoo Kim, Sudhakar Pamarti, Minyoung Song, 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.

A Regulated Charge Pump With a Low-Power Integrated Optimum Power Point Tracking Algorithm for Indoor Solar Energy Harvesting

Chulwoo Kim, Jungmoon Kim, Jihwan Kim, 2011, IEEE Transactions on Circuits and Systems II: Express Briefs.

An 11.2-Gb/s LVDS Receiver With a Wide Input Range Comparator

Chulwoo Kim, Junyoung Song, Sewook Hwang, 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Ultra-low–power Pulse Oximeter with a 32.768 kHz Real Clock

Chulwoo Kim, Youngsun Han, Seon Wook Kim, 2017 .

A $\hbox{Gb/s}+$ Slew-Rate/Impedance-Controlled Output Driver With Single-Cycle Compensation Time

Chulwoo Kim, Young-Ho Kwak, Inhwa Jung, 2010, IEEE Transactions on Circuits and Systems II: Express Briefs.

An oscillator collapse-based comparator with application in a 74.1dB SNDR, 20KS/s 15b SAR ADC

Chulwoo Kim, David Blaauw, Dennis Sylvester, 2016, 2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits).

Experimental Comparison of Adaptive vs. Static Thumbnail Displays

Chulwoo Kim, Jan P. Allebach, Mark R. Lehto, 2007, HCI.

A 140 Mb/s to 1.96 Gb/s Referenceless Transceiver With 7.2 $\mu$s Frequency Acquisition Time

Chulwoo Kim, Daejung Shin, Taejin Kim, 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A DC–DC Boost Converter With Variation-Tolerant MPPT Technique and Efficient ZCS Circuit for Thermoelectric Energy Harvesting Applications

Chulwoo Kim, Jungmoon Kim, Chulwoo Kim, 2013, IEEE Transactions on Power Electronics.

Self-impedance calibrated PVT-insensitive pseudo open drain output driver without external resistors

Chulwoo Kim, Junyoung Song, Sewook Hwang, 2012 .

A cost-effective design of spread spectrum clock generator

Chulwoo Kim, Minyoung Song, Chulwoo Kim, 2010, 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology.

23.1 A 0.15V-input energy-harvesting charge pump with switching body biasing and adaptive dead-time for efficiency improvement

Chulwoo Kim, Philip K. T. Mok, Jungmoon Kim, 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).

A Simplified QoS scheme using Virtual Link in MPLS based backhone network

Chulwoo Kim, Chul-Hee Kang, Jung Dae Kim, 2003 .

A 7ps-Jitter 0.053mm2 Fast-Lock ADDLL with Wide-Range and High-Resolution All-Digital DCC

Chulwoo Kim, Young-Jung Choi, Kwan-Weon Kim, 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

An all digital time amplifier with interpolation scheme for low gain variation

Chulwoo Kim, Debashis Dhar, Young-Ho Kwak, 2010, 2010 International SoC Design Conference.

A 1.62 Gb/s–2.7 Gb/s Referenceless Transceiver for DisplayPort v1.1a With Weighted Phase and Frequency Detection

Chulwoo Kim, Junyoung Song, Sewook Hwang, 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.

High-speed CMOS circuits with parallel dynamic logic and speed-enhanced skewed static logic

Chulwoo Kim, Sung-Mo Kang, Kwang-Hyun Baek, 2002 .

D2ART: Direct Data Accessing from Passive RFID Tag for infra-less, contact-less, and battery-less pervasive computing

Chulwoo Kim, Seon Wook Kim, Joon Goo Lee, 2015, Microprocess. Microsystems.

A 0.076mm2 3.5GHz spread-spectrum clock generator with memoryless Newton-Raphson modulation profile in 0.13μm CMOS

Chulwoo Kim, Sewook Hwang, Minyoung Song, 2011, 2011 IEEE International Solid-State Circuits Conference.

A single-inductor 8-channel output DC-DC boost converter with time-limited one-shot current control and single shared hysteresis comparator

Chulwoo Kim, Jungmoon Kim, Dong Seok Kim, 2011, 2011 Symposium on VLSI Circuits - Digest of Technical Papers.

A Bidirectional High-Voltage Dual-Input Buck Converter for Triboelectric Energy-Harvesting Interface Achieving 70.72% End-to-End Efficiency

Chulwoo Kim, Junwon Jeong, Minseob Shim, 2019, 2019 Symposium on VLSI Circuits.

A 1.6V 1.4Gb/s/pin consumer DRAM with self-dynamic voltage-scaling technique in 44nm CMOS technology

Chulwoo Kim, Hyun-Woo Lee, Young-Jung Choi, 2011, 2011 IEEE International Solid-State Circuits Conference.

3Gbps referenceless clock and data recovery circuit

Chulwoo Kim, Inhwa Jung, Gabin Kim, 2012 .

A 110 dB, 3-mW fourth-order Σ-Δ modulator for atmospheric pressure sensor

Chulwoo Kim, Taeyoon Kim, Sungchul Lee, 2008, 2008 International Symposium on System-on-Chip.

Self-Powered 30 µW to 10 mW Piezoelectric Energy Harvesting System With 9.09 ms/V Maximum Power Point Tracking Time

Chulwoo Kim, Junwon Jeong, Jungmoon Kim, 2014, IEEE Journal of Solid-State Circuits.

An adaptive multi-path forwarding scheme for traffic engineering in MPLS networks

Chulwoo Kim, Chul-Hee Kang, Seung Joon Seok, 2005 .

A 1.62–5.4-Gb/s Receiver for DisplayPort Version 1.2a With Adaptive Equalization and Referenceless Frequency Acquisition Techniques

Chulwoo Kim, Junyoung Song, Yeonho Lee, 2017, IEEE Transactions on Circuits and Systems I: Regular Papers.

A 20 Gb/s Clock and Data Recovery With a Ping-Pong Delay Line for Unlimited Phase Shifting in 65 nm CMOS Process

Chulwoo Kim, Yongtae Kim, Sewook Hwang, 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.

A 0.008 ${\hbox {mm}}^{2}$ 500 $\mu{\rm W}$ 469 kS/s Frequency-to-Digital Converter Based CMOS Temperature Sensor With Process Variation Compensation

Chulwoo Kim, Jabeom Koo, Sewook Hwang, 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.

NMOS energy recovery logic

Chulwoo Kim, Sung-Mo Kang, Seung-Moon Yoo, 1999, Proceedings Ninth Great Lakes Symposium on VLSI.

Edge-Pursuit Comparator: An Energy-Scalable Oscillator Collapse-Based Comparator With Application in a 74.1 dB SNDR and 20 kS/s 15 b SAR ADC

Chulwoo Kim, David Blaauw, Dennis Sylvester, 2017, IEEE Journal of Solid-State Circuits.

An Antiharmonic, Programmable, DLL-Based Frequency Multiplier for Dynamic Frequency Scaling

Chulwoo Kim, Jabeom Koo, Sunghwa Ok, 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A 3D anthropometric sizing analysis system based on North American CAESAR 3D scan data for design of head wearable products

Chulwoo Kim, Xiaopeng Yang, Heecheon You, 2018, Comput. Ind. Eng..

A 1-V 10-Gb/s/pin Single-Ended Transceiver With Controllable Active-Inductor-Based Driver and Adaptively Calibrated Cascaded-Equalizer for Post-LPDDR4 Interfaces

Chulwoo Kim, Junyoung Song, Sewook Hwang, 2018, IEEE Transactions on Circuits and Systems I: Regular Papers.

Referenceless Clock and Data Recovery algorithm for DisplayPort v1.2

Chulwoo Kim, Junyoung Song, Sewook Hwang, 2012 .

An Add-On Type Real-Time Jitter Tolerance Enhancer for Digital Communication Receivers

Chulwoo Kim, Junyoung Song, Yeonho Lee, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

An Introduction to High-Speed DRAM

Chulwoo Kim, Junyoung Song, Hyun-Woo Lee, 2014 .

A 3 Gb/s transmitter with a tapless pre-emphasis CML output driver

Chulwoo Kim, Junyoung Song, Sewook Hwang, 2014 .

366-kS/s 1.09-nJ 0.0013-${\rm mm}^{2}$ Frequency-to-Digital Converter Based CMOS Temperature Sensor Utilizing Multiphase Clock

Chulwoo Kim, Kisoo Kim, Hokyu Lee, 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Parallel dynamic logic (PDL) with speed-enhanced skewed static (SSS) logic

Chulwoo Kim, Sung-Mo Kang, Seong-Ook Jung, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

An Efficiency-Aware Cooperative Multicharger System for Photovoltaic Energy Harvesting Achieving 14% Efficiency Improvement

Chulwoo Kim, Junwon Jeong, Minseob Shim, 2020, IEEE Transactions on Power Electronics.

A 0.004mm/sup 2/ Portable Multiphase Clock Generator Tile for 1.2GHz RISC Microprocessor

Chulwoo Kim, Sung-Bae Park, Junyoung Park, 2006, 2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers..

Adaptive frequency with power-level tracking system for efficient magnetic resonance wireless power transfer

Chulwoo Kim, Nam-Yun Kim, Jinsung Choi, 2012 .

A low spurious 14.4mW 1.8GHz CMOS FVC-based clock generator for portable SoC processors

Chulwoo Kim, Soo-Won Kim, Gil-Su Kim, 2007, 2007 IEEE Asian Solid-State Circuits Conference.

A 1-mW Solar-Energy-Harvesting Circuit Using an Adaptive MPPT With a SAR and a Counter

Chulwoo Kim, Soo-Won Kim, Chan-Hui Jeong, 2013, IEEE Transactions on Circuits and Systems II: Express Briefs.

A 10 Gbits/s/pin DFE-Less Graphics DRAM Interface With Adaptive-Bandwidth PLL for Avoiding Noise Interference and CIJ Reduction Technique

Chulwoo Kim, Hyun-Woo Lee, Junyoung Song, 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A single-inductor 8-channel output DC-DC boost converter with time-limited power distribution control and single shared hysteresis comparator

Chulwoo Kim, Jungmoon Kim, 2014, 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC).

OpenMP and Compilation Issue in Embedded Applications

Chulwoo Kim, Seon Wook Kim, Jaegeun Oh, 2003, WOMPAT.

High Performance and Area-Efficient Circuit-Switched Network on Chip Design

Chulwoo Kim, Yogendera Kumar, Phi-Hung Pham, 2006, The Sixth IEEE International Conference on Computer and Information Technology (CIT'06).

A 1.2GHz delayed clock generator for high-speed microprocessors

Chulwoo Kim, Moo-young Kim, Inhwa Jung, 2008, 2008 Asia and South Pacific Design Automation Conference.

Low Power Response Time Accelerator with Full Resolution for LCD Panel

Chulwoo Kim, Soo-Won Kim, Meejoung Kim, 2003, PATMOS.

A Portable and Input-Duty-Independent Multiphase Clock Generator

Chulwoo Kim, Pulkit Jain, Dongsuk Shin, 2006 .

Energy-efficient skewed static logic design with dual Vt

Chulwoo Kim, Sung-Mo Kang, Ki-Wook Kim, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

Differential Pass Transistor Pulsed Latch

Chulwoo Kim, Moo-young Kim, Young-Ho Kwak, 2005, SoCC.

250Mbps-5Gbps wide-range CDR with digital vernier phase shifting and dual mode control in 0.13μm CMOS

Chulwoo Kim, Byoung-Joo Yoo, Deog-Kyoon Jeong, 2010, 2010 IEEE Asian Solid-State Circuits Conference.

Charge-sharing-problem reduced split-path domino logic

Chulwoo Kim, Seon Wook Kim, Seok-Ryong Yoon, 2004, 17th International Conference on VLSI Design. Proceedings..

Circuit design techniques for multimedia wireline communications

Chulwoo Kim, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

A 32 Gb/s Rx only equalization transceiver with 1-tap speculative FIR and 2-tap direct IIR DFE

Chulwoo Kim, Junyoung Song, Sewook Hwang, 2016, 2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits).

New current-mode sense amplifiers for high density DRAM and PIM architectures

Chulwoo Kim, Sung-Mo Kang, Seong-Ook Jung, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

A 1.5 GHz spread spectrum clock generator with a 5000ppm piecewise linear modulation

Chulwoo Kim, Yongtae Kim, Minyoung Song, 2008, 2008 IEEE Custom Integrated Circuits Conference.

An automatic threshold-converged CMOS optical receiver for high-definition digital audio interfaces

Chulwoo Kim, Soo-Won Kim, Gil-Su Kim, 2007, IEICE Electron. Express.

Introduction to the January Special Issue on the 2015 IEEE International Solid-State Circuits Conference

Chulwoo Kim, Edith Beigné, Jan Genoe, 2016, IEEE J. Solid State Circuits.

A cost-effective design of non-linear modulation profile for spread spectrum clock

Chulwoo Kim, Sewook Hwang, Minyoung Song, 2012, 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology.

29.5 12Gb/s over four balanced lines utilizing NRZ braid clock signaling with 100% data payload and spread transition scheme for 8K UHD intra-panel interfaces

Chulwoo Kim, Jaehun Jun, Junyoung Song, 2017, 2017 IEEE International Solid-State Circuits Conference (ISSCC).

Wide frequency range duty cycle correction circuit for DDR interface

Chulwoo Kim, Soo-Won Kim, Dongsuk Shin, 2008, IEICE Electron. Express.

On ROC Curve Analysis of Artificial Neural Network Classifiers

Sung-Hyuk Cha, Chulwoo Kim, Yoo Jung An, 2017, FLAIRS Conference.

A low-power reduced swing single clock flip-flop

Chulwoo Kim, Sung-Mo Kang, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

A slew-rate controlled output driver with one-cycle tuning time

Chulwoo Kim, Young-Ho Kwak, Inhwa Jung, 2008, 2008 Asia and South Pacific Design Automation Conference.

A 5.4Gb/s adaptive equalizer with unit pulse charging technique in 0.13µm CMOS

Chulwoo Kim, Junyoung Song, Sewook Hwang, 2012, 2012 IEEE International Symposium on Circuits and Systems.

A 4.5-to-16μW integrated triboelectric energy-harvesting system based on high-voltage dual-input buck converter with MPPT and 70V maximum input voltage

Chulwoo Kim, Junwon Jeong, Minseob Shim, 2018, 2018 IEEE International Solid - State Circuits Conference - (ISSCC).

Sptpl: a New Pulsed Latch Type Flip-Flop in High-Performance System-on-a-Chip (SOC)

Chulwoo Kim, Moo-young Kim, Inhwa Jung, 2007, J. Circuits Syst. Comput..

Effect of Providing a Web-Based Collaboration Medium for Remote Customer Troubleshooting Tasks

Chulwoo Kim, Jan P. Allebach, Mark R. Lehto, 2007, HCI.

A 7.7mW/1.0ns/1.35V delay locked loop with racing mode and OA-DCC for DRAM interface

Chulwoo Kim, Hyun-Woo Lee, Yong-Hoon Kim, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

A CMOS optical receiver with subtraction-based level shifter for high-definition digital audio interfaces

Chulwoo Kim, Soo-Won Kim, Gil-Su Kim, 2007 .

A Dual-Mode Continuously Scalable-Conversion-Ratio SC Energy Harvesting Interface With SC-Based PFM MPPT and Flying Capacitor Sharing Scheme

Chulwoo Kim, Junyoung Maeng, Hyunjin Kim, 2021, IEEE Journal of Solid-State Circuits.

A High-Voltage Dual-Input Buck Converter With Bidirectional Inductor Current for Triboelectric Energy-Harvesting Applications

Chulwoo Kim, Junwon Jeong, Minseob Shim, 2021, IEEE Journal of Solid-State Circuits.

A 0.99-pJ/b 15-Gb/s Counter-Based Adaptive Equalizer Using Single Comparator in 28-nm CMOS

Chulwoo Kim, Yoonjae Choi, Jonghyuck Choi, 2021, IEEE Transactions on Circuits and Systems II: Express Briefs.

A Power Management System Based on Adaptive Low-Dropout Voltage Regulator with Optimal Reference Pre-Compensation Technique

Chulwoo Kim, Jinseok Oh, Inho Park, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

A 1-3.2 GHz 0.6 mW/GHz Duty-Cycle-Corrector Using Bangbang Duty-Cyle-Detector

Chulwoo Kim, Jincheol Sim, Hyunsu Park, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

A Hybrid DC-DC Converter Capable of Supplying Heavy Load in Step-Up and Step-Down Mode

Chulwoo Kim, Junyoung Maeng, Hyunjin Kim, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

Wide input range hybrid DC-DC conversion system for solar energy harvesting

Chulwoo Kim, Jong-Kook Kim, Jungmoon Kim, 2012 .

Efficient planar organic semiconductors containing fused triphenylamine for solution processed small molecule organic solar cells

Chulwoo Kim, Jae Kwan Lee, Kihyung Song, 2013 .

High molar extinction coefficient organic sensitizers for efficient dye-sensitized solar cells.

Chulwoo Kim, Jun-Ho Yum, Michael Grätzel, 2010, Chemistry.

Spin-Based Complementary Logic Device Using Datta–Das Transistors

Chulwoo Kim, Hyun Cheol Koo, Inhwa Jung, 2015, IEEE Transactions on Electron Devices.

Differential pass transistor pulsed latch

Chulwoo Kim, Inhwa Jung, Moo Young Kim, 2005, Proceedings 2005 IEEE International SOC Conference.

A 0.004-mm$^{2}$ Portable Multiphase Clock Generator Tile for 1.2-GHz RISC Microprocessor

Chulwoo Kim, Janghoon Song, Gunok Jung, 2008, IEEE Transactions on Circuits and Systems II: Express Briefs.

Generator with Memoryless Newton-Raphson Modulation Profile in 0.13μm CMOS

Chulwoo Kim, Young-Ho Kwak, Inhwa Jung, 2011 .

Ordered multimodal porous carbon as highly efficient counter electrodes in dye-sensitized and quantum-dot solar cells.

Chulwoo Kim, Jong-Sung Yu, B. Fang, 2010, Langmuir : the ACS journal of surfaces and colloids.

Efficient and stable panchromatic squaraine dyes for dye-sensitized solar cells.

Chulwoo Kim, Seulgi So, Kihyung Song, 2011, Chemical communications.

A Single-Input Four-Output (SIFO) AC–DC Rectifying System for Vibration Energy Harvesting

Chulwoo Kim, Jihwan Kim, Minseob Sim, 2014, IEEE Transactions on Power Electronics.

24-Gb/s Input-Data-Independent Clock and Data Recovery Utilizing Bit-Efficient Braid Clock Signaling With Fixed Embedded Transition for 8K-UHD Intrapanel Interface

Chulwoo Kim, Yoonjae Choi, Yeonho Lee, 2019, IEEE Solid-State Circuits Letters.

Enhancing the Performance of Organic Dye-Sensitized Solar Cells via a Slight Structure Modification

Chulwoo Kim, Peng Wang, Kihyung Song, 2011 .

A CMOS self-regulating VCO with low supply sensitivity

Chulwoo Kim, Sung-Mo Kang, In-Chul Hwang, 2004, IEEE J. Solid State Circuits.

23.7 Self-powered 30μW-to-10mW Piezoelectric energy-harvesting system with 9.09ms/V maximum power point tracking time

Chulwoo Kim, Minseob Shim, Junwon Jung, 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).