S. Aunet

Reconfigurable subthreshold CMOS perceptron

Y. Berg, S. Aunet, B. Oelmann, 2004, 2004 IEEE International Joint Conference on Neural Networks (IEEE Cat. No.04CH37541).

Floating-gate low-voltage/low-power linear threshold element for neural computation

T. Saether, S. Aunet, Y. Berg, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

Multifunction subthreshold gate used for a low power full adder

T.S. Lande, Y. Berg, S. Aunet, 2004, Proceedings Norchip Conference, 2004..

Subthreshold AES S-Box with Increased Power Analysis Resistance

S. Aunet, H.P. Alstad, 2008, 2008 NORCHIP.

D-latch for subthreshold floating-gate circuits exploiting threshold elements

S. Aunet, J. Alfredsson, 2007, Norchip 2007.

Ultra low power fault tolerant neural inspired CMOS logic

S. Aunet, V. Beiu, 2005, Proceedings. 2005 IEEE International Joint Conference on Neural Networks, 2005..

Low-voltage pseudo floating-gate reconfigurable linear threshold elements

S. Aunet, Y. Berg, O. Nass, 2005, Proceedings. 2005 IEEE International Joint Conference on Neural Networks, 2005..