Robert Wisnieff

Leveraging Secondary Storage to Simulate Deep 54-qubit Sycamore Circuits

John A. Gunnels, Lior Horesh, Giacomo Nannicini, 2019, 1910.09534.

Pareto-Efficient Quantum Circuit Simulation Using Tensor Contraction Deferral

John A. Gunnels, Lior Horesh, Giacomo Nannicini, 2017 .

Wafer-scale epitaxial graphene growth on the Si-face of hexagonal SiC (0001) for high frequency transistors

Keith A. Jenkins, Phaedon Avouris, Yu-Ming Lin, 2010 .