N. Owada

A 6-p m2 bipolar transistor using 0.25-p m process y for high-speed applications

S. Wada, T. Hash, K. Watanabe, 1998 .

A 6-/spl mu/m/sup 2/ bipolar transistor using 0.25-/spl mu/m process technology for high-speed applications

M. Kondo, K. Watanabe, N. Owada, 1998, Proceedings of the 1998 Bipolar/BiCMOS Circuits and Technology Meeting (Cat. No.98CH36198).

Direct measurement of localized joule heating in silicon devices by means of newly developed high resolution IR microscopy

N. Owada, A. Yasuda, Hizuru Yamaguchi, 1991, 29th Annual Proceedings Reliability Physics 1991.

A 0.2-/spl mu/m bipolar-CMOS technology on bonded SOI with copper metallization for ultra high-speed processors

T. Ikeda, S. Kondo, S. Wada, 1998, International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).

Stress‐induced grain boundary fractures in Al–Si interconnects

Kenji Hinode, N. Owada, Kiichiro Mukai, 1987 .